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1 3 : HEVC GPU (Sangmin Kim et al. : Adaptive Search Range Decision for Accelerating GPU-based Integer-pel Motion Estimation in HEVC Encoders) (Regular Paper) 19 5, (JBE Vol. 19, No. 5, September 2014) ISSN (Online) ISSN (Print) HEVC GPU a), a), b), a) Adaptive Search Range Decision for Accelerating GPU-based Integer-pel Motion Estimation in HEVC Encoders Sangmin Kim a), Dongkyu Lee a), Dong-Gyu Sim b), and Seoung-Jun Oh a) High Efficiency Video Coding (HEVC) GPU (integer-pel) (Motion Estimation). Motion Vector Difference (MVD)., MVD. MVD. GPU Motion Vector (MV). CPU, CPU GPU. GPU. 1.1% BD-rate 37.9% , 57.5% 0.6% BD-rate. Abstract In this paper, we propose a new Adaptive Search Range (ASR) decision algorithm for accelerating GPU-based Integer-pel Motion Estimation (IME) of High Efficiency Video Coding (HEVC). For deciding the ASR, we classify a frame into two models using Motion Vector Differences (MVDs) then adaptively decide the search ranges of each model. In order to apply the proposed algorithm to the GPU-based ME process, starting points of the ME are decided using only temporal Motion Vectors (MVs). The CPU decides the ASR as well as the starting points and transfers them to the GPU. Then, the GPU performs the integer-pel ME. The proposed algorithm reduces the total encoding time by 37.9% with BD-rate increase of 1.1% and yields times faster ME against the CPU-based anchor. In addition, the proposed algorithm achieves the time reduction of 57.5% in the ME running time with the negligible coding loss of 0.6%, compared with the simple GPU-based ME without ASR decision. Keyword : HEVC, Fast ME, Adative Search Range, MVD, GPGPU

2 (JBE Vol. 19, No. 5, September 2014). Moving Picture Experts Group (MPEG) Video Coding Experts Group (VCEG) High Efficiency Video Coding (HEVC). HEVC H.264/AVC 40%.,., (Motion Estimation : ME) 70%, [1]. [2]-[7]. Central Processing Unit (CPU) [2]-[4] Graphics Process- ing Unit (GPU) [5]-[7]. CPU three-step search [2] four-step search [3] diamond search [4]. GPU [5]-[7] General-Purpose computing on GPU (GPGPU). [2]-[4] Single Instruction Multiple Threads (SIMT) a) (Dept. of Electronic Engineering, Kwangwoon university) b) (Dept. of Computer Engineering, Kwangwoon university) Corresponding Author : (Seoung-Jun Oh) sjoh@kw.ac.kr Tel: [ , ] Manuscript received July 10, 2014 Revised September 4, 2014 Accepted September 4, 2014., SIMT GPGPU. SIMT, GPU (integer-pel). (global) (local). Motion Vector Difference (MVD),. Coding Tree Unit (CTU) MVD. [7]. [7] Nvidia GPGPU CUDA(Compute Unified Device Architecture). Prediction Unit (PU) (Advanced Motion Vector Prediction : AMVP) PU. Motion Vector (MV) [8][9]. CPU, GPU. GPU. low complexity.. 2 HEVC CUDA. 3, 4. 5, 6.

3 3 : HEVC GPU (Sangmin Kim et al. : Adaptive Search Range Decision for Accelerating GPU-based Integer-pel Motion Estimation in HEVC Encoders). HEVC CUDA 1. HEVC H.264/AVC 16x16 (Macroblock : MB) HEVC 64x 64~16x16 (Coding Tree Unit : CTU), 64x64~8x8 (quad tree). Coding Unit (CU). CU PU, PU. (1). J - (Rate-Distortion : RD), SAD Sum of Absolute Differences (SAD). B MVP MV MVD. λ (lagrangian multiplier). J MV... H.264/AVC MB MV MVP,. HEVC AMVP PU MV MV MVP. 1 MVP MV. 2. CUDA CUDA CPU host GPU (thread) device. (kernel) CPU SIMT GPU. CUDA. (thread block), (grid). GPU - (on-chip) (shared memory). 3. CUDA Kepler GPU Streaming Multiprocessor (SMX), SMX Streaming Processor (SP),,, (warp scheduler). SMX 32 (warp),.. -,.. 1. Fig. 1. ME process GPU

4 (JBE Vol. 19, No. 5, September 2014), [7]. [5] (fractional-pel) GPU - (latency). [6]. [7] (hierarchical) SAD,. Concurrent Parallel Reduction (CPR) SAD Parallel Reduction (PR) (synchronization). [7] SAD CPR. [7], MB SAD. MB 4x4 SAD. 4x4 SAD SAD group, MB 16 SAD group CPR SAD. PR (utilization). data hazard. CPR SAD group SAD group.,., CPR 16 4x4 IMV(integer-pel MV). 8x4, 4x8 SAD 4x4 SAD, 8x4, 4x8 16 SAD group. SAD group CPR, 16 IMV. IMV. [7] HEVC 32x32 CTU. 8x8 PU SAD, CPR PU IMV.., AMVP PU. PU PU PU PU MV. H.264/AVC. [7].. [8][9]. Search Starting Point (SSP). SSP CTU CTU MV, CTU PU SSP.. GPU [5]-[7]. [2]-[4] SIMT., SIMT GPGPU. SIMT MVD, GPU.. MVD,. CTU MVD. 2.,. CPU SSP GPU. GPU

5 3 : HEVC GPU (Sangmin Kim et al. : Adaptive Search Range Decision for Accelerating GPU-based Integer-pel Motion Estimation in HEVC Encoders) 2. Fig. 2. Overflow of the proposed algorithm, CPU. Rate-Distrotion Optimization (RDO) PU IMV. RDO HEVC test model (HM). RDO RDO IMV. HM. 1. MV MVP MVD. MVD..,. (dominant) (chess board distance : ), MVD chess. MVD chess 0. D motion (Degree of Motion),. D motion 0, D motion 3. 3 Class B 2. D motion Table 2. Experimental environment for D motion research reference model HM 10.0 configuration low delay P QP 22,27,32,37 sequence Class B number of frame 100 CTU size 32x32 reference frame 1 search type full search search range ±16

6 (JBE Vol. 19, No. 5, September 2014) D motion 37%. (correlation). D motion., D motion 37%, LMF(Large Motion Frame). 3. Class B D motion Fig. 3. D motion Distribution of Class B sequences. 4 D motion 2 (Gaussian distribution). (error minimization) 37%. 4. Class B D motion Fig. 4. Gaussian modeling of D motion distribution of Class B sequences SMF(Small Motion Frame). 2.. LMF SMF. CTU. CTU MVD CTU. MVD CTU CTU MVD chess. 5 LMF SMF MVD CTU. (Laplacian distribution).., SMF MVD CTU TH SMF (Search Range : SR), LMF TH LMF SR. 5. SMF LMF MVD CTU Fig. 5. Distributions of MVD CTU in SMF and LMF

7 3 : HEVC GPU (Sangmin Kim et al. : Adaptive Search Range Decision for Accelerating GPU-based Integer-pel Motion Estimation in HEVC Encoders). 3 MVD CTU 0 75%~95% MVD CTU 1/4 (quarter-pel). LMF 6 MVD CTU 6 MVD CTU 75%. 3. MVD CTU Table 3. Threshold section and MVD CTU Section Mode 75% 85% 95% LMF -6~6-12~12-32~32 SMF -1~1-3~3-11~11. 7 TH LMF 85% TH SMF 95% Class B Basketball Drive Bjontegaard-delta bitrate (BD-rate) [10] 0.6% 1.1%. TH LMF TH SMF 85% 95%., LMF, CTU MVD CTU TH LMF,. 3 3 TH LMF TH SMF. 4. TR(Time Reduction). TR (3). 4. Table 4. Test environment for threshold and adaptive search range decision reference model HM 10.0 configuration low delay P QP 22,27,32,37 sequence Class B number of frame 100 CTU size 32x32 reference frame 1 search type full search search range ±8 6. Fig. 6. Comparison of coding performance for threshold decision. 6,7. 6 TH LMF TH SMF 75% 95% TR., TH LMF TH SMF 95%. 7. TR Fig. 7. Comparison of ME TR for threshold decision TH LMF TH SMF. 3 4x4, 8x8, 12x12 TH LMF TH SMF. 8,9

8 (JBE Vol. 19, No. 5, September 2014) TR BD-rate. 8x8. TH LMF TH SMF CTU 8x8. 10 (pseudo code).. 8. SR Fig. 8. Comparison of coding performance for SR decision HEVC HM 10.0 CUDA GPU. CPU Intel i7 3.07GHz, 16GB DRAM, GPU GeForce GTX 460, 1GB DRAM. 5. TR. BD-rate RD. (training set) Class B (test set) Class A,C. 5. Table 5. Test environment for coding performance evaluation of the proposed algorithm 9. SR TR Fig. 9. Comparison of ME TR for SR decision configuration low delay P QP 22,27,32,37 sequence Class A,B,C number of frame 100 CTU size 32x32 reference frame 1 search type full search search range ±16 prediction mode no 4x8 and 8x4 inter predictions AMP off 10. Fig. 10. Pseudo code for adaptive search range decision 11 Class A C D motion. Class A 37% D motion. (D motion 37%) LMF,., Class C D motion

9 3 : HEVC GPU (Sangmin Kim et al. : Adaptive Search Range Decision for Accelerating GPU-based Integer-pel Motion Estimation in HEVC Encoders) 11. Class A C D motion Fig. 11. D motion Distributions of Class A and Class c sequences D motion 16%. 37%. 37% 16% (Class B) (Class A,C) Y BD-rate 1%, 37.9% TR. SSP. SSP Y BD-rate 0.5%. SSP 0.5% 0.6% Y BD-rate 1.1%., 12 RD.. 6. Table 6. Coding performance of the proposed algorithm Class A Class B Class C Sequence BD-rate (%) Encoding Time (h) Encoding TR (%) Y U V Anchor Algorithm Traffic PeopleOnStreet Class A average Kimono ParkScene Cactus BasketballDrive BQTerrace Class B average BasketballDrill BQMall PartyScene RaceHorses Class C average Total average

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11 3 : HEVC GPU (Sangmin Kim et al. : Adaptive Search Range Decision for Accelerating GPU-based Integer-pel Motion Estimation in HEVC Encoders) 12. RD Fig. 12. RD curve comparisons between anchor and the proposed algorithm Table 7. ME execution time of the proposed algorithm Class A Class B Class C Sequence ME Time (s) Anchor Algorithm Speed-up Traffic x PeopleOnStreet x Class A average x Kimono x ParkScene x Cactus x BasketballDrive x BQTerrace x Class B average x BasketballDrill x BQMall x PartyScene x RaceHorses x Class C average x Total average x

12 (JBE Vol. 19, No. 5, September 2014) SIMT % BD-rate, 57.5% TR. Low delay P Common Test Condition (CTC) 5. CTC Class A,B C Y BD-rate 17.5%., CTC TR TR 46.2% 99.8% Y BD-rate 18.8%. 5. low delay P low complexity,. CTC MVD. CTC.. MVD, GPU., LMF SMF, CTU. CPU, GPU., SSP.. CPU 1.1% BD-rate, 37.9% Table 8. Coding performance of adaptive search range Class A Class B Class C Sequence BD-rate (%) IME Time (ms) Y U V Anchor Algorithm IME TR (%) Traffic PeopleOnStreet Class A average Kimono ParkScene Cactus BasketballDrive BQTerrace Class B average BasketballDrill BQMall PartyScene RaceHorses Class C average Total average

13 3 : HEVC GPU (Sangmin Kim et al. : Adaptive Search Range Decision for Accelerating GPU-based Integer-pel Motion Estimation in HEVC Encoders)., 0.6% 57.5% TR. (References) [1] F. Bossen, B. Bross, K. Suhring, and D. Flynn, HEVC Complexity and Implementation Analysis, IEEE Transactions on Circuit Systems for Video Technoogy, vol. 22, no. 12, Dec [2] R. Li, B. Zeng, M. L. Liou, A new three-step search algorithm for block motion estimation, IEEE Trans. Circuits Syst. Video Technol., vol. 4, no: 4, pp , Aug [3] L. M. Po, W. C. Ma, A novel four-step search algorithm for fast block motion estimation, IEEE Trans. Circuits Syst. Video Technol., vol. 6, pp , June [4] S. Zhu, K. K. Ma, A new diamond search algorithm for fast block matching motion estimation, Information, Communications and Signal Processing, ICICS., , vol.1, Sep [5] W. N. Chen, H. M. Hang, H.264/AVC motion estimation implementation on Compute Unified Device Architecture (CUDA), IEEE International Conference on Multimedia and Expo, pp , April, [6] J. Zhou, L. Jiao, X. Cao, Implementation of parallel full search algorithm for motion estimation on multi-core processors, International Conference on Next Generation Information Technology, Gyeongju, pp , June [7] D. K. Lee, S. J. Oh, Variable block size motion estimation implementation on compute unified device architecture (CUDA), IEEE International Conference on Consumer Electronics, Las Vegas, pp , Jan [8] R. Rodriguez, L. Martinez, Accelerating H.264 Inter Prediction in a GPU by using CUDA, International Conference on Consumer Electronics (ICCE), Las Vegas, pp , Jan [9] R. Rodriguez, J. L. Martinez, Reducing Complexity in H.264/AVC Motion Estimation by using a GPU, IEEE International Workshop on Multimedia Signal Processing (MMSP), Hangzhou, pp. 1-6, Oct [10] G. Bjontegaard, Calculation of average PSNR differences between RD-curves, document VCEG-M33, ITU-T SG16 Q.6 Video Coding Experts Group (VCEG), April : ~ : - :, : : ~ : - :,

14 (JBE Vol. 19, No. 5, September 2014) : : : ~ : ~ : ~ : University of Washington Senior research engineer ~ : - :,, : : : Syracuse University / ~ : ~ : NSF Supercomputer Center ~ : Northeast Parallel Architecture Center ~ : ~ : ~ : SC29-Korea MPEG Forum - :,,