Preliminary CANTUS - UART - 32bits EISC Microprocessor CANTUS Ver 1. October 8, 29 Advanced Digital Chips Inc.
Ver 1. PRELIMINARY CANTUS Application Note( EVM B d ) History 29-1-8 Created Preliminary Specification CANTUS Evaluation Board Application Note : #2 UART cadvanced Digital Chips Inc. All right reserved. No part of this document may be reproduced in any form without written permission from Advanced Digital Chips Inc. Advanced Digital Chips Inc. reserves the right to change in its products or product specification to improve function or design at any time, without notice. Office 8th Floor, KookMin 1 Bldg., 19-5, Daechi-Dong, Gangnam-Gu, Seoul, 135-28, Korea Tel : +82-2-217-58 Fax : +82-2-571-489 URL : http://www.adc.co.kr 2 Advanced Digital Chips Inc.
CANTUS Application Note ( EVM B d ) PRELIMINARY Ver 1. Table of Contents 1 SUMMARY... 6 2 REGISTER SET... 7 2.1 REGISTER SET FLOW CHART... 7 2.2 PORT ALTERNATE FUNCTION REGISTER... 8 2.3 UART CHANNEL FIFO CONTROL REGISTER... 9 2.4 UART CHANNEL LINE CONTROL REGISTER... 9 2.5 UART CHANNEL DIVISOR LATCH LSB REGISTER... 1 2.6 UART CHANNEL DIVISOR LATCH MSB REGISTER... 1 2.7 UART CHANNEL INTERRUPT ENABLE REGISTER... 11 2.8 UART INTERRUPT SET... 11 2.9 UART INTERRUPT ENABLE... 11 2.1 UART CHANNEL RECEIVER BUFFER REGISTER... 11 2.11 UART CHANNEL TRANSMITTER HOLDING REGISTER... 11 3 FUNCTION SET... 12 3.1 FUNCTION SET FLOW CHART... 12 3.1.1 evmboardinit()... 13 3.1.2 InitInterrupt()... 13 3.1.3 UartConfig()... 13 3.1.4 UartGetCh()... 14 3.1.5 UartPutCh()... 14 3.2 UART.C... 15 4 POINT THIS NOTE... 16 Advanced Digital Chips Inc. 3
Ver 1. PRELIMINARY CANTUS Application Note( EVM B d ) List of Figures 그림 2-1 Register Set Flow Chart... 7 그림 3-1 Function Set Flow Chart... 12 4 Advanced Digital Chips Inc.
CANTUS Application Note ( EVM B d ) PRELIMINARY Ver 1. List of Tables 표 2-1 Port 1 Alternate Function... 8 표 2-2 Port Alternate Function 1 Register (PAF1)... 8 표 2-3 UART Channel FIFO Control Register 7 (U7FC)... 9 표 2-4 UART Channel Line Control Register 7 (U7LC)... 9 표 2-5 UART Channel Divisor Latch LSB Register 7 (U7DLL)... 1 표 2-6 UART Channel Divisor Latch MSB Register 7 (U7DLM)... 1 표 2-7 UART Baud Rate... 1 표 2-8 UART Channel Interrupt Enable Register 7 (U7IE)... 11 표 2-9 UART Channel Receiver Buffer Register 7 (U7RB)... 11 표 2-1 UART Channel Transmitter Holding Register 7 (U7TH)... 11 Advanced Digital Chips Inc. 5
Ver 1. PRELIMINARY CANTUS Application Note( EVM B d ) 1 Summary 이문서는 CANTUS SDK 의 UART 에대한 Application Note 이다. UART Project 는 CANTUS 의 UART Controller 를이용하여 PC 와직렬비동기통신을하게된다. 통신이연결되면 사용자가하이퍼터미널에서입력한키를다시 PC 로전송하여화면에출력하는예제이다. 또한모든 Application 은 Debug 용도로 UART 7 번 Channel 을사용하고있다. 6 Advanced Digital Chips Inc.
CANTUS Application Note ( EVM B d ) PRELIMINARY Ver 1. 2 Register Set 2.1 Register Set Flow Chart CANTUS 의 UART 를사용하기위해선다음과같은순서로 Register 를설정한다. START Port Alternate Function 1 Register Set UART Channel FIFO Control Register Set UART Channel Line Control Register Set UART Channel Divisor Latch LSB Register Set UART Channel Divisor Latch MSB Register Set UART Channel Interrupt Enable Register Set UART Interrupt Set UART Interrupt Enable END 그림 2-1 Register Set Flow Chart Advanced Digital Chips Inc. 7
Ver 1. PRELIMINARY CANTUS Application Note( EVM B d ) 2.2 Port Alternate Function Register UART Channel 7 은 8, 9 번 PIN 을사용한다. 이들 PIN 은아래표 2-1 과같이다른 Function 을공유하고있어 UART Channel 7 을사용하기위해서는 Port Alternate Function 1 Register 에서 8 번 9 번 PIN 을 TX[7], RX[7] 로설정하여야한다. 1 표 2-1 Port 1 Alternate Function Group Index Pin 1 st 2 nd 3 rd 4 th (default) 2 TX[4] KEY_O[] AD[8] P1. 1 3 RX[4] KEY_I[] AD[9] P1.1 2 4 TX[5] KEY_O[1] AD[1] P1.2 PAF1 3 5 RX[5] KEY_I[1] AD[11] P1.3 4 6 TX[6] KEY_O[2] AD[12] P1.4 5 7 RX[6] KEY_I[2] AD[13] P1.5 6 8 TX[7] KEY_O[3] AD[14] P1.6 7 9 RX[7] KEY_I[3] AD[15] P1.7 표 2-2 Port Alternate Function 1 Register (PAF1) Address : x82_24 Bit R/W Description Default Value 31 : 16 R Reserved - 15 : 14 R/W P1.7 : P1.7 Port Selection bit 11 : RX[7] 1 : KEYI[3] 1 : AD[15] 11 : P1.7 13 : 12 R/W P1.6 : P1.6 Port Selection bit 11 : TX[7] 1 : KEYO[3] 1 : AD[14] 11 : P1.6 11 : 1 R/W P1.5 : P1.5 Port Selection bit 11 : RX[6] 1 : KEYI[2] 1 : AD[13] 11 : P1.5 9 : 8 R/W P1.4 : P1.4 Port Selection bit 11 : TX[6] 1 : KEYO[2] 1 : AD[12] 11 : P1.4 7 : 6 R/W P1.3 : P1.3 Port Selection bit 11 : RX[5] 1 : KEYI[1] 1 : AD[11] 11 : P1.3 5 : 4 R/W P1.2 : P1.2 Port Selection bit 11 : TX[5] 1 : KEYO[1] 1 : AD[1] 11 : P1.2 3 : 2 R/W P1.1 : P1.1 Port Selection bit 11 : RX[4] 1 : KEYI[] 1 : AD[9] 11 : P1.1 1 : R/W P1. : P1. Port Selection bit 11 : TX[4] 1 : KEYO[] 1 : AD[8] 11 : P1. 1 CANTUS Datasheet 의 8 GPIO 참조. 8 Advanced Digital Chips Inc.
CANTUS Application Note ( EVM B d ) PRELIMINARY Ver 1. 2.3 UART Channel FIFO Control Register 표 2-3 UART Channel FIFO Control Register 7 (U7FC) Address : x82_1868 Bit R/W Description Default Value 31 : 8 R Reserved. - 7 : 6 RW RFTL : Receiver FIFO Trigger Level : 1 Byte 1 : 4 Byte 1 : 8 Byte 11 : 16 Byte 5 : 3 R Reserved - 2 RW XFR : XMIT FIFO Reset XFR가 1 일때, XMIT FIFO 내의모든데이터는 Reset 된다. 그러나 Shift Register 내의데이터는 Reset 되지않는다. 1 RW RFR : RCVR FIFO Reset RFR가 1 일때, RCVR FIFO 내의모든데이터는 Reset 된다, 그러나 Shift Register 내의데이터는 Reset 되지않는다. RW FIFOEN : FIFO Enable Bit : 1645 UART Mode 1 : Enables FIFO *** DLAB가 일때는 Write Mode 이고, DLAB가 1 일때는 Read Mode 이다. 2.4 UART Channel Line Control Register 표 2-4 UART Channel Line Control Register 7 (U7LC) Address : x82_186c Bit R/W Description Default Value 31 : 8 R Reserved. - 7 RW DLAB : Divisor Latch Access Bit DLAB이 1 일때, Divisor Latch Registers의 Read/Write와 FIFO Control Register의 Read가가능하다. 6 RW SB : Set Break SB가 1 일때, Serial Data Output에 Logic 이출력된다. SB는내부 Transmitter Logic에는영향을미치지않으며, 단지 Serial Output에만영향을미친다. 5 RW SP : Stick Parity : Disables Stick Parity 1 : PEN, EPS, SP가 1 일때, Parity Bit PEN, SP가 1 이고, EPS가 일때, Parity Bit 1 4 RW EPS : Even Parity Select : Select Odd Parity 1 : Select Even Parity 3 RW PEN : Parity Enable Bit : Disables Parity 1 : Enables Parity 2 RW STB : Number of Stop Bit : 1 Stop bit 1 : 2 Stop bits( 만약, WLS Bit에서 5 Bits/Character를선택했다면, 1.5 Stop bits 을갖는다.) 1 : RW WLS : Word Length Select : 5 Bits/Character 1 : 6 Bits/Character 1 : 7 Bits/Character 11 : 8 Bits/Character Advanced Digital Chips Inc. 9
Ver 1. PRELIMINARY CANTUS Application Note( EVM B d ) 2.5 UART Channel Divisor Latch LSB Register 표 2-5 UART Channel Divisor Latch LSB Register 7 (U7DLL) Address : x82_186 Bit R/W Description Default Value 31: 8 R Reserved. - 7 : RW Divisor Latch Least Significant Byte x *** DLAB가 1 일때 Access 가능하다. 2.6 UART Channel Divisor Latch MSB Register 표 2-6 UART Channel Divisor Latch MSB Register 7 (U7DLM) Address : x82_1864 Bit R/W Description Default Value 31: 8 R Reserved. - 7 : RW Divisor Latch Most Significant Byte x *** DLAB가 1 일때 Access 가능하다. Baud Rate 은아래식으로계산된다. UART Baud Rate 16 f PCLK UDL UART Divisor Latch Value (UDL) = UDLM[7:] << 8 + UDLL[7:] 표 2-7 UART Baud Rate f (MHz) 1.24 2.48 5.6448 11.2896 24. 48. PCLK 24 bps UDL 27 53 147 294 625 125 ERR(%) 1.23.63.... 48 bps UDL - 27 74 147 313 625 ERR(%) - 1.23.68..16. 96 bps UDL - - 37 74 156 313 ERR(%) - -.68.68.16.16 144 bps UDL - 9 25 49 14 28 ERR(%) - 1.23 2...16.16 192 bps UDL - - 18 37 78 156 ERR(%) - - 2.8.68.16.16 384 bps UDL - - 9 18 39 78 ERR(%) - - 2.8 2.8.16.16 576 bps UDL - - 6 12 26 52 ERR(%) - - 2.8 2.8.16.16 1152bp s UDL - - 3 6 13 26 ERR(%) - - 2.8 2.8.16.16 *** ERR 이 2.2% 이상에서는 UART 동작의안정성을보장받을수없다. 1 Advanced Digital Chips Inc.
CANTUS Application Note ( EVM B d ) PRELIMINARY Ver 1. 2.7 UART Channel Interrupt Enable Register 표 2-8 UART Channel Interrupt Enable Register 7 (U7IE) Address : x82_1864 Bit R/W Description Default Value 31: 3 R Reserved. - 2 RW RLSIEN : Receiver Line Status Interrupt Enable bit : Disable 1 : Enable 1 RW THEIEN : Transmitter Holding Empty Interrupt Enable bit : Disable 1 : Enable RW RDAIEN : Received Data Available Interrupt Enable bit : Disable 1 : Enable *** DLAB가 일때 Access 가능하다. 2.8 UART Interrupt Set UartConfig() 함수에서아래함수를호출하여수행한다. \Cantuslib\interrupt.c BOOL setinterrupt(interrupt_type intnum,void (*fp)()); 2.9 UART Interrupt Enable UartConfig() 함수에서아래함수를호출하여수행한다. \Cantuslib\interrupt.c void EnableInterrupt(INTERRUPT_TYPE num,bool b); 2.1 UART Channel Receiver Buffer Register UART로수신한 Data를저장하는 Buffer 표 2-9 UART Channel Receiver Buffer Register 7 (U7RB) Address : x82_186 Bit R/W Description Default Value 31: 8 R Reserved. - 7 : R Receive Buffer Data - *** DLAB가 일때 Access 가능하다. 2.11 UART Channel Transmitter Holding Register UART로송신할 Data Buffer 표 2-1 UART Channel Transmitter Holding Register 7 (U7TH) Address : x82_186 Bit R/W Description Default Value 31: 8 W Reserved. - 7 : W Transmit Holding Data - *** DLAB가 일때 Access 가능하다. Advanced Digital Chips Inc. 11
Ver 1. PRELIMINARY CANTUS Application Note( EVM B d ) 3 Function Set 3.1 Function Set Flow Chart START evmboardinit() InitInterrupt() UartConfig() while(1) UartGetCh()? Y UartPutCh() 그림 3-1 Function Set Flow Chart 12 Advanced Digital Chips Inc.
CANTUS Application Note ( EVM B d ) PRELIMINARY Ver 1. 3.1.1 evmboardinit() evmboardinit() 함수는 CANTUS Evaluation Board 를사용하기위한기본 Setting 을수행한다. void evmboardinit() { *(volatile U16*)x844 = x2;//bank 1 8Bit *R_PAF = xaaaa; //SRAM interface address, data *R_PAF1 = xd5; //uart4,keyio1,keyo2,,pio1.5,uart7 *R_PAF2 = xaaaa; /* ncs, nwe, nre, ALE */ *R_PAF3 = xaaa; //EIRQ-1,NDFL_* *R_PAF4 = xaaaa; // I2S, SDCD, TWI *R_PAF5 = xaaaa; //SDCD,I2S,Address *R_PAF6 = x3; //PIO6.4 Amp Shutdown *R_P6oDIR = (1<<4); // PIO6.4 output mode } *(volatile unsigned char *)(x62) = LCD_BACK SDC_PWR_BIT; //LCD,SDC int j; for (j=; j<1; j++); *(volatile unsigned char *)(x62) = LCD_BACK SDC_PWR_BIT LCD_PWR; //LCD,SDC 3.1.2 InitInterrupt() InitInterrupt() 함수는 CANTUS 의 Interrupt 를사용하기위한초기화과정을수행한다. 사용자는별도의설정을할필요가없다. 3.1.3 UartConfig() BOOL UartConfig(int ch, int baud, UART_DATABITS databits, UART_STOPBITS stopbit, UART_PARITY parity); UartConfig() 함수는 CANTUS 의 UART 를사용하기위한 Configuration 과정을진행하는함수로 2.2 ~ 2.9 에해당하는 Register Set 을모두진행하기때문에사용자가별도의 Register 설정없이 Uart 를사용할수있다. UART_DATABITS, UART_STOPBITS, UART_PARITY 는 uart.h 에정의된구조체이다. int ch : UART 의 Channel 번호 int baud : UART Channel ch 의 baudrate 를설정한다. Ex) 1152 bps 일경우 1152 UART_DATABITS databits : Data 로사용할 bit 의개수를설정 UART_STOPBITS stopbit : Stop bit 의개수를설정 UART_PARITY parity : Parity check 를설정 (None, Odd, Even) Advanced Digital Chips Inc. 13
Ver 1. PRELIMINARY CANTUS Application Note( EVM B d ) 3.1.4 UartGetCh() Return : TRUE or FALSE int n : Data 를가져올 UART 의 Channel 번호 char *ch : 수신 Data 를저장할변수의주소 BOOL UartGetCh(int n, char* ch); 3.1.5 UartPutCh() Return : TRUE or FALSE int n : 송신할 UART 의 Channel 번호 char ch : 송신할 Data BOOL UartPutCh(int n, char ch); 14 Advanced Digital Chips Inc.
CANTUS Application Note ( EVM B d ) PRELIMINARY Ver 1. 3.2 Uart.c \Cantuslib\Uart.c CANTUS 의 UART 에관련된함수의원형과 Ring_buffer 가구현되어있다. SDK 에서제공하는 Application 은 Evaluation Board 에맞도록 Debug 용으로 UART 7 번이설정되어있다. \Cantuslib\Cantus_lib_config.h Cantuslib 를 Build 하기위한환경설정으로 UART 와관련된부분을다음과같이구성해놓았다. /*********************************************** Uart Config ***********************************************/ //#define UART_ENABLE //#define UART1_ENABLE //#define UART2_ENABLE //#define UART3_ENABLE //#define UART4_ENABLE //#define UART5_ENABLE //#define UART6_ENABLE #define UART7_ENABLE #define UART_BUF_SIZE 512 #define CONFIG_UART_RX_INTERRUPT //#define CONFIG_UART_TX_INTERRUPT #define DEBUG_CHANNEL 7 #define CONFIG_DEBUGPRINTF_ENABLE //debugprintf funcion, if enabled, 1kbyte need DEBUG_CHANNEL debugstring() 함수와 debugprintf() 함수의출력 Channel. CONFIG_UART_RX_INTERRUPT 이부분이정의되면 uart.c 에서수신 Interrupt 를처리하기위해 Ring_buffer 가정의되고함수에서수신 Interrupt 를처리할수있도록 Compile 한다. 정의되지않으면 Ring_buffer 를사용하지않고 UART Channel Receiver Buffer Register 만사용하도록 Compile 한다. 사용자가이구성을따르지않는 UART Application 을제작할경우위의정의부분도수정하면된다. Advanced Digital Chips Inc. 15
Ver 1. PRELIMINARY CANTUS Application Note( EVM B d ) 4 Point This Note CANTUS 의 UART Register 에관한설정은 UartConfig() 함수를호출함으로써이뤄진다. CANTUS 의 UART 설정시 \Cantuslib\Cantus_lib_config.h 를확인하고, 필요할경우수정하여야한다. CANTUS 의 UART 에관한내용은 CANTUS Datasheet 13 UART 를참고하라. 16 Advanced Digital Chips Inc.