Orcad Capture 9.x

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1 OrCAD Capture Workbook (Ver 10.xx) 0

2 Capture 1

3 2

4 3

5 Capture for window 4.opj ( OrCAD Project file) Design file Programe link file..dsn (OrCAD Design file) Design file..olb (OrCAD Library file) file..upd (Property Update file) file..swp (back annotate file) - layout capture file..drc (Design rule check report file) rule file..bom (Bill of material file) file..xrf (Cross Reference part report file) part file..mnl (Netlist file) Footpriont file.

6 (hot) Key 5

7 Schematic 6

8 7

9 Net Alias ( Only One sheet) 8

10 Net Alias Bus Bus entry 9

11 10

12 Off- Page Connector ( Flat, One Sheet ) Page 11

13 12

14 13 <Simple Hierarchy> Complex

15 Generic, Port Generic, ( Hierarchical + Flat + One sheet ) > Flat One Sheet Port DRC Checking. Off-page Connector, Port. 14

16 15

17 16

18 OrCAD Capture for Windows 1. Capture ( 33 Window ) Schematic Editor Window 17 Session Window

19 18

20 2. Capture Bar ( 5 Bar ) Title Bar Menu Bar Tool Bar Tool Palette 19 Status Bar

21 20

22 Tool Bar 21

23 Tool palette bar 22

24 Place part (hot key ; P) Part Search Wild card Extension Character ( EX ; *LS00, NE5*, MOC*21, ) 23 Question Character ( EX ; SHC?01, TL?544M,?LP161, ZSR800/S?, )

25 24

26 25

27 Place Wire 26

28 Place Net Alias 27

29 Net Alias One Sheet 28

30 Place BUS 29 pin Net alias.

31 Place Juntion Place no connect 30

32 Place Hierachical block Reference : Part Reference Reference Name. Implementation type : Block type. schematic view, VHDL VHDL. Implementation name : Block schematic name. 31 Path and filename : implementation type schematic view source.

33 32

34 33

35 34

36 2. Block type Implementation name BlockBlock implementation name.

37 36

38 Place off-page connect 37

39 Place hierarchical Port 38

40 39 BUS Connect, Port

41 Capture Flow 1. Schematic Design -----> *.DSN 2. Up Date Part Reference ( ) - Annotate U? > U1, U2 R? > R1, R2 40

42 3. Footprint 3 : 1> (UPD file ) 2> ( ) 3> Layout 4. Design Rules Check ( DRC Check) *.DRC = ERC Matrix 5. [Save] 6. Create Netlist : *.MNL 41

43 Annotate (Up Date Reference ) U1, U2, R1, R2 C1, C2 Part Reference Name. 42

44 43

45 44

46 Footprint (3 ) 1. *.UPD file ( ) 45

47 UPD file (Value) target PCB Footprint Name. 46.

48 *.UPD file (Tools Update Properties) Update update.. 47 Update.

49 48 Layout Tools Library Manager

50 3. Layout 49. Library. Library viewer Footprint.

51 Design Rule Check 50

52 ERC matric 51

53 Create Netlist 52. Tap key tool Netlist. Capture Net Layout Net component.

54 53

55 7. ( Option ) Preference - ( Color, Print, Grid, Zoom factor, Auto Reference, Box fill Style ) Design template - Schematic Page Properties - ( Schematic Size, Grid Reference) 54

56 Preference Color/print Print. 55.

57 Grid, Grid display 56

58 drag Pan and zoom 57

59 drag drag Select drag 58

60 Miscellaneous fill( ) style. Session log font. Text Rendering - Text. Auto Recovery -. 59

61 Text Editor 60 font

62 Schematic page properties Page size Unit Page size 61

63 Grid Reference 62 Grid reference Boarder title block, print Width 0(zero) Grid reference.

64 Miscellaneous. 63

65 Design Template Fonts Page setting. 64

66 Title Block 65 Page title block Title block.

67 Page size 66 Page Page size.

68 Grid Reference 67 Page Grid reference.

69 68 Hierarchy

70 SDT compatibility 69

71 Part Symbol 70

72 71

73 72

74 73

75 74

76 75

77 76

78 77

79 78

80 79

81 80

82 Auto ECO Schematic PCB 81

83 - # Port Type # Net Alias (One Sheet Off - Page Connector (One + Flat Hierarchical(Generic, Module) Port (One + Flat + Hierarchical) # Net List Error # < Netlist #1> Pin Name Error ( Capture to Layout ) Number 82

84 < Netlist #2> Run ECO to Layout User Properties are in Inch - Netlist Inch --> Layout Default.tch tch Run ECO to Layout User Properties are in Millimeter - Netlist Millimeter --> Layout Metric.tch tch MCM.tch <Netlist #3> Error 83 EX >.MNL /.MAX > ( X ) ( Layout )

85 # Schematic Library Type ( Pin Type) EX> Input Output Passive 84

Mentor_PCB설계입문

Mentor_PCB설계입문 Mentor MCM, PCB 1999, 03, 13 (daedoo@eeinfokaistackr), (kkuumm00@orgionet) KAIST EE Terahertz Media & System Laboratory MCM, PCB (mentor) : da & Summary librarian jakup & package jakup & layout jakup &