Microsoft PowerPoint - ch07ysk2012.ppt [호환 모드]

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1 전자회로 Ch7 CMOS Aplifiers 김영석 충북대학교전자정보대학 Eail: k Ch7-

2 7. General Considerations 7.2 Coon-Source Stae Ch7 CMOS Aplifiers 7.3 Coon-Gate Stae 7.4 Source Follower 7.5 Suary and Additional Exaples Ch7-2

3 7. General Considerattions 7..2 MOS Biasin W 2 I μ ncox ( VGS VTH), V 2 L V GS ( V V ) V GS V 2 + V 2 V 2 2 TH TH, + 2 V V S I W μncox L S Voltae at X is deterined by V,, and 2. V GS can be found usin the equation aboe, and I can be found by usin the NMOS current equation. Ch7-3

4 7..3 Current Sources When in saturation reion, a MOSFET behaes as a current source. NMOS draws current fro a point to round (sinks current), whereas PMOS draws current fro V to a point (sources current). (c),(d) not operatin as a current source (low output res.) Ch7-4

5 7.2 Coon-Source Stae A (λλ 0) I Δ V / 2 μ C n ox W L ΔV 2μ C n ox W L I, ΔV V GS V TH In order to aintain operation in saturation, Vout cannot fall below Vin by ore than one threshold oltae. V V V, V I V V S I GS < V TH ( V V ) GS TH GS TH Ch7-5

6 CS Stae with λ 0 ( r ) A in r out L L O O Howeer, Early effect and channel lenth odulation affect CE and CS staes in a siilar anner. Ch7-6

7 7.2.2 CS Stae with Current-Source Load A out ( r r ) r O O O 2 r O2 To alleiate the headroo proble, an actie current- source load is used. This is adantaeous because a current-source has a hih output resistance and can tolerate a sall oltae drop across it. Ch7-7

8 7.2.3 CS Stae with iode-connected Load A A 2 ( W/ L) ( W/ L ) ro 2 ro 2 2 Lower ain, but less dependent on process paraeters. Ch7-8

9 7.2.4 CS Stae with eeneration A λ 0 + S r r + out O S r O Siilar to bipolar counterpart, when a CS stae is deenerated, its ain, I/O ipedances, and linearity chane. Siilar to the bipolar counterpart, deeneration boosts output ipedance. Ch7-9

10 7.2.5 CS Core with Biasin S G S A A A + + +, /, / 2 2 eeneration is used to stabilize bias point, and a bypass capacitor can be used to obtain a larer sall-sinal Ch7-0 oltae ain at the frequency of interest.

11 7.3 Coon-Gate Stae A Coon-ate stae is siilar to coon-base stae: a rise in input causes a rise in output. So the ain is positie. In order to aintain M in saturation, the sinal swin at V out cannot fall below V b -V TH. Ch7-

12 I/O Ipedances of CG Stae in λ 0 out The input and output ipedances of CG stae are siilar to those of CB stae. Ch7-2

13 CG Stae with Source esistance A When a source resistance is present, the oltae ain is equal to that of a CS stae with deeneration, only positie. + S Ch7-3

14 7.3. CG Stae with Biasin 3 ( / ) ( ) out in 3 / + G and 2 proide ate bias oltae, and 3 proides a path for C bias current of M to flow to round. Ch7-4

15 7.4 Source Follower Stae A < Ch7-5

16 Source Follower Core r out O in + r O L L Siilar to the eitter follower, the source follower can be analyzed as a resistor diider. Ch7-6

17 Output esistance of Source Follower r out O L The output ipedance of a source follower is relatiely low, whereas the input ipedance is infinite ( at low frequencies); thus, a ood candidate as a buffer. L Ch7-7

18 7.5 Additional Exaple Exaple of a CS Stae (I) A out ro r ro ro O2 r O3 r O3 M acts as the input deice and M 2, M 3 as the load. Ch7-8

19 Exaple of a CS Stae (II) A ro r O 3 M acts as the input deice, M 3 as the source resistance, and M 2 as the load. Ch7-9

20 Exaples of CS and CG Staes _ CS [( + r ) r ] r } A + r + O2 A _ CG { S 2 O S O O2 With the input connected to different locations, the two circuits, althouh identical in other aspects, s, behae differently. Ch7-20

21 Exaple of a Coposite Stae (I) A + 2 By replacin the left side with a Theenin equialent, and reconizin the riht side is actually a CG stae, the oltae ain can be easily obtained. Ch7-2

22 Exaple of a Coposite Stae (II) out in out2 in r 3 r 2 2 O3 O2 r O4 + This exaple shows that by probin different places in a circuit, different types of output can be obtained. V out is a result of M actin as a source follower whereas V out2 is a result of M actin as a CS stae with deeneration. Ch7-22

23 Suary Ipedances Ch5-23

24 Suary MOS Aplifiers A ( ( ro ) A + r ) A o / + L in in in out ( ro ) out ( ro ) out ( L ) L Ch5-24

Microsoft PowerPoint - ch03ysk2012.ppt [호환 모드]

Microsoft PowerPoint - ch03ysk2012.ppt [호환 모드] 전자회로 Ch3 iode Models and Circuits 김영석 충북대학교전자정보대학 2012.3.1 Email: kimys@cbu.ac.kr k Ch3-1 Ch3 iode Models and Circuits 3.1 Ideal iode 3.2 PN Junction as a iode 3.4 Large Signal and Small-Signal Operation