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1 Journal of the Korea Academia-Industrial cooperation Society Vol. 17, No. 11 pp , ISSN / eissn 김규환한화시스템 Design and Implementation of Linear Gain Equalizer for Microwave band Kyoo-Hwan Kim Hanwha Systems 요약초고주파대역에서사용하는소자들은기생성분으로인하여주파수가증가함에따라이득이감소한다. 이러한특성을보상하기위해전자전과같은광대역시스템에서는반대의기울기를갖는선형이득등화기가필요하다. 본논문에서는 18~40GHz 대역에서사용할수있는선형이득등화기를설계하고제작하였다. 설계와제작의오차를줄이기위하여회로설계와모멘텀설계를진행하였다. 구현주파수대역내에서가능한기생성분을최소화하기위해 thin film 공정을사용하였으며, 박막저항의길이에의한파장변화를최소화하기위해 100 ohm/square의 sheet resistance 로설계하였다. 본선형이득등화기는직렬마이크로스트립라인에사분의일파장을갖는공진기를저항으로결합하는구조이다. 모두 3개의 1/4 파장의 Short 공진기를사용하였다. 제작된선형이득등화기는 40GHz에서 -5dB 이상의손실을가졌으며, 18 ~ 40 GHz 대역에서 6dB 기울기를나타내었다. 제작된이득등화기를전자전수신기와같은광대역 MMIC들이다단으로연결된장치내부에사용한다면주파수가증가에따른이득평탄도악화를감소시킬수있을것이다. Abstract In the devices used in the microwave frequency band, the gain decreases as the frequency increases due to the parasitic component. To compensate for these characteristics, a linear gain equalizer with an opposite slope is needed in wideband systems, such as those used for electronic warfare. In this study, a linear gain equalizer that can be used in the 18 ~ 40GHz band is designed and fabricated. Circuit design and momentum design (optimizations) were carried out to reduce the errors between design and manufacturing. A thin film process is used to minimize the parasitic components within the implementation frequency band. A sheet resistance of 100 ohm/square was employed to minimize the wavelength variation due to the length of the thin film resistor. This linear gain equalizer is a structure that combines a quarter wavelength-resonator on a series microstrip line with a resistor. All three 1/4 wavelength short resonators were used. The fabricated linear gain equalizer has a loss of more than -5dB at 40GHz and a 6dB slope in the 18 ~ 40GHz band. By using the manufactured gain equalizer in a multi-stage connected device such as an electronic warfare receiver, the gain flatness degradation with increasing frequency can be reduced. Keywords : Electronic warfare, Broadband Receiver, Gain Equalizer, Linear Gain Equalizer, Gain Slope 1. 서론 전자전시스템에사용되는 RF 수신기는그특성상 100% 이상의 Fractional Bandwidth 를갖는광대역주파 수를처리할수있도록설계된다. 이러한수신기에사용되는스위치, 신호분배기및결합기, 증폭기등과같은능 수동소자들은주파수에따라손실특성이증가하는특성을보이며, 이는시스템전체의이득특성을악화시 * Corresponding Author : Kyoo-Hwan Kim(Hanwha Systems) Tel: mask2001@naver.com Received September 27, 2016 Revised November 9, 2016 Accepted November 10, 2016 Published November 30,

2 한국산학기술학회논문지제 17 권제 11 호, 2016 키는요인으로작용한다.[1] 양질의시스템성능을확보하기위해서는주파수에따른이득기울기를보상해주기위한회로가필수적이다. 선형이득등화기는 18GHz 대역까지설계, 제작되어사용되고있으며, 국내기술력또한성숙한단계이다. 하지만전자전과같은시스템에서요구하는주파수대역이 mm-wave 대역까지상승하고있는현시점에서사용할수있는이득등화기는국내외적으로제품을찾아볼수없는형편이다. 이러한현상을해결하기위해 MMIC 업체들이주파수에따라이득특성이증가하여수동소자의손실을보상할수있는증폭소자들을개발하여판매하고있으나설계자의입맛에맞게사용할수없는단점이있다. 이에본논문에서는 18~40GHz 대역의선형이득등화기 (Linear Gain Equalizer) 를설계및제작하여향후 mm-wave 분야전자전수신기에적용하고자한다. 1 To be equalized Broadband Receiving Channel 2 Equalizer Linear Gain Equalizer Fig. 1. The role of linear gain equalizer 3 Equalized 대역내이득기울기의선형성등을확보하기위하여다단의공진기를사용하게되며, 각공진기의공진주파수는대역내의최대주파수가되도록설계한다. L C 2. 본론 R2 R1 R2 2.1 선형이득등화기이론광대역에서손실이주파수에따라선형적으로증가하는수신기의특성을보상해주기위해서이득등화기는이와반대의특성을가져야하며, 수신기와결합시원하는이득평탄도를갖도록해야한다. 이득등화기전단부에놓이는수신기의이득기울기에따라그특성이달라지겠으나대부분의선형이득등화기는원하는대역의최대주파수에서는최소손실을갖도록하고최소주파수에서는원하는억압특성을가지며, 중간부분은주파수에따라손실이선형이되도록해야한다.[2] 아래 Fig 1에선형이득등화기의역할에대해나타내었고 Fig 2에선형이득등화기의기본구조를나타내었다.[3] 선형이득등화기는공진기와이를주전송선로와저항으로결합하고, 저항의값을조절하여기출기를조정함으로만들수있다. 이경우이득등화기는저차의대역통과필터와같이동작하게된다. Fig. 2. The basic structure of linear gain equalizer 주파수에따라사용되는공진기의형태는달라지게 되는데, 낮은 주파수의 경우에는 L(Inductor) 과 C(Capacitor) 를이용하여구현할수있으며 [4], 높은주 파수의경우에는 Microstrip Line을이용하여구현한다. 2.2 설계및제작 본논문에서설계한선형이득등화기의설계목표는 아래 Table 1. 과같다. Table 1. Specifications of Linear Gain Equalizer Parameter Specifications Freqeuency Band 18~40GHz Slope 4dBSlopeovertheBW Insertion Loss VSWR 2:1 636

3 Var Eqn 설계및제작하고자하는주파수대역이 18~40GHz 로높기때문에일반적인기판을사용할수없으며, 공진기와결합을위한저항도일반적인 chip 저항을사용할수없다. 따라서본논문에서는 mm-wave 대역에서손실을최소화하고, 동일대역의수신기의회로중간에삽입이용이하도록 9.8의유전율을갖는 Alumina 5mil 기판을이용하고 Thin Film 공정을이용하여설계, 제작하였다. 공진기와결합을위해사용한저항또한 micro-strip line과일괄공정이가능한 Thin Film Resistor를사용하였다. 아래 Table 2에설계및제작에사용한기판의정보를나타내었다. 가능한영향을적게주도록설계해야하며, 부득이할경우이를고려하여공진기의길이를계산된 1/4 파장보다짧게설계해야한다. 일반적으로사용되는 Thin film resistor의 sheet resistance는 50 Ohm/square 이지만가능한길이를짧게하고자 100 Ohm/square의 sheet resistance로저항을설계하였다. Sheet resistance 값이두배가되었기때문에동일한저항값을절반의길이로구현할수있다. Keysight사의 ADS(Advanced Design System) 를사용하여설계하였으며, Circuit Simulation을통해초기값을설정하고, 2D Simulation을수행하였다. Fig. 4에설계된 18~40GHz 이득등화기의 Schematic 을, Fig. 5에 Circuit Simulation 결과를나타내었다. Table 2. Infomation of Alumina Substrate Parameter Characteristics Dielectric Constant 9.8 Dielectric Loss Tangent Substrate Height 5mil Conductor conductivity 4.1E+7Simens/meter Conductor thickness 17um Conductor Surfaceroughness 0 설계된이득등화기는모두 3개의 1/4 파장의 Short 공진기를사용하였다. 1/2파장 Open 공진기를사용할수도있으나이경우에는공진주파수의 1/2 되는지점에서 1/4파장의 Open 형태가되어 Pole이발생한다. Fig. 3에설계된 18~40GHz 이득등화기의구조를나타내었다. MSub S-PARAMETERS MSUB S_Param MSub1 SP1 Start=15 GHz Er=9.8 Stop=45 GHz Mur=1 Step=0.1 GHz Cond=4.0E+7 Hu=6 mm TanD= Rough=0 mm TL6 L=L1 mm VAR VAR1 W1=0.11 L1=0.8 L2=0.5 L3=0.15 L4=0.15 MGAP Gap1 S=L3 mm Tee1 TL7 W3=W1 mm L=L1 mm V9 TL11 TFR R1 L=L3 mm Tee3 TL8 TL9 L=L1 mm W3=W1 mm L=L1 mm Tee2 Term Term1 Num=1 W3=W1 mm Z=50 Ohm MGAP TFR MGAP TFR Gap2 R2 Gap3 R3 S=L4 mm L=L4 mm S=L4 mm L=L4 mm TL10 TL12 V7 V8 Fig. 4. Schematic of linear gain equalizer Term Term2 Num=2 Z=50 Ohm Fig. 3. The structure of 18~40GHz linear gain equalizer 설계시고려해야할부분은 40GHz에서짧은파장으로인해 Thin Film Resistor의크기및 via-hole의크기가 1/4 파장공진주파수에영향을주는것이다. 따라서 Fig. 5. Result of circuit simulation () 637

4 한국산학기술학회논문지제 17 권제 11 호, 2016 Circuit Simulation은회로의구조에대한고려가정확하게반영되지않기때문에초기값을구하는것으로만사용해야한다. 2~3GHz 이하의비교적낮은주파수대역에서는 Circuit Simulation의결과와 2D 수치해석의결과그리고실제제작의결과가큰차이가없지만그이상의주파수의경우에는차이를보인다. 본논문에서제작하고자하는 18~40GHz같이파장이짧은주파수의경우에는 Circuit Simulation의결과와 2D 수치해석의결과도차이가크고, 2D 수치해석의결과와실제제작후측정결과도큰차이를보인다. 따라서가능한예상되는상황들을고려하여설계에반영해야한다. 본설계에서예상되어지는변수로는저항의구조에따른주파수특성과 Via-Hole의영향등을들수있다. 저항및 Via-Hole의영향을고려하여공진기의길이를실제계산보다짧게설계하였다. 이렇게설계된 18~40GHz 선형이득등화기의 Momentum 해석을위한 Layout을아래 Fig. 6에나타내었다. 2D Simulation을통해얻어진결과는 Circuit Simulation을통해얻어진결과와다르다. 실제제작시발생하는오차를고려하여공진기의길이를다소줄여보다높은주파수에서공진이생기도록하고기울기를조정하여최종 Simulation을수행하였다. 설계된 18~40GHz 이득등화기를 ATC사의 Thin Film 공적을이용하여제작하였다. 제작된이득등화기의사진을 Fig. 8에, 측정된결과를 Fig. 9에나타내었다. 측정된결과를보면, 공진점이 37GHz에서생성된것을볼수있다. Fig. 7. The result of momentum simulation (a), (b) S11. Fig. 6. Layout for Momentum Analysis 2D Simulation을통해얻어진결과는 Circuit Simulation을통해얻어진결과와다르다. 실제제작시발생하는오차를고려하여공진기의길이를다소줄여보다높은주파수에서공진이생기도록하고기울기를조정하여최종 Simulation을수행하였다. 아래그림에최종적으로설계된 18~40GHz 이득등화기의 Momentum 해석결과를나타내었다. Fig. 8. The photograph of implemented 18~40GHz linear gain equalizer. 이로인해 40GHz 대역의손실이증가하였다. 측정된이득 Slope은대략 6dB 가량으로설계값보다증가하였으며, 37GHz 까지선형적인이득특성을나타내는것 638

5 을볼수있다. 이와같이실제제작시에공진주파수가이동하는특성은제작하는과정에서발생하는가공오차로보이며, 이를얼마나예측하여설계와차이를줄이느냐가성공적인설계인지를가늠하는기준이된다. Fig. 10은제작된이득등화기와 18~40GHz 대역의 8-Way Divider 를연결하여측정한결과이다. 18~40GHz 대역에서 7dB 이상의기울기 Slope을보였던 8-Way Divider의 특성이이득등화기를통과한후평탄해진것을확인할수있다 ~40GHz Equalizer Divider + Equalizer 18~40GHz 8-Way Divider freq, GHz Fig ~40GHz divider plus equalizer performance References [1] Mellor, D., On the design of matched equalizers of prescribed gain versus frequency profiles, IEEE MTT-S Intl Microwave Symposium, , San Diego, CA., June DOI: [2] Sungtek Kahng, Jeongho Ju, Wongyu Moon, Design and Implementation of the GHz-Band Wide(6~18GHz) Linear Equalizer Korea Electromagnetic Eng. Soc. vol. 18, no. 2, pp , Feb DOI: [3] Vendelin, G., A. Pavio, and U. Rohde, Microwave Circuit Design Using Linear and Nonlinear Techiques, J. Wiley and Sons, New York, [4] M. Sankara Narayana, Gain equalizer flattens attenuation over 6~18 GHz, Applied Microwave & Wireless, Nov./Dec 김규환 (Kyoo-Hwan Kim) [ 정회원 ] 1998 년 2 월 : 광운대학교전자공학과 ( 전자공학사 ) 2000 년 2 월 : 광운대학교전자공학과 ( 전자공학석사 ) 2008 년 4 월 ~ 현재 : 한화시스템전문연구원 3. 결론 18~40GHz 대역의선형이득등화기를설계하고제작하였다. 주파수에따른기생성분을최소화하기위하여한번의공정에서저항까지제작가능한 Thin Film 공정을이용하여제작하였다. 사용한기판은유전율 9.8, 두께 5mil의 Alumina 기판을사용하였다. 제작된선형이득등화기는 40GHz에서 -5dB 이상의손실을가졌으며, 기울기는 6dB Slope을나타내었다. 본논문에서설계및제작된이득등화기를전자전수신기와같은광대역 MMIC들이다단으로연결된장치의내부에사용한다면주파수가증가함에따라발생하는이득평탄도악화를어느정도해소할수있을것으로기대한다. < 관심분야 > 초고주파회로, RF 시스템 639

THE JOURNAL OF KOREAN INSTITUTE OF ELECTROMAGNETIC ENGINEERING AND SCIENCE Oct.; 27(10),

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