Analog Simulation with PSpice Lab Workbook 368 3F Phone (02) Fax (02) Analog Simu
|
|
- 진혁 돈
- 8 years ago
- Views:
Transcription
1 PSpice A/D Simulation with PSpice Workbook Software Version 10x
2 Analog Simulation with PSpice Lab Workbook 368 3F Phone (02) Fax (02) Analog Simulation with PSpice page iii
3 Capture v Introduce v Simulation 1 Bias Point Analysis 11 DC Sweep 17 AC Sweep 23 Stimulus Editor 31 Transient Analysis 37 Parametric Analysis 43 Editing a model! subcircuit! simulation model symbol! Symbol Editor! Hierarchical blocks symbols! page iv Analog Simulation with PSpice
4 Introduction Spice (Simulation Program eith Integrated Circuit Emphasis) :,,, (simulation) SPICE, 1972 Berkely SPICE,,,,,,FET Pspice : SPICE 1972 Berkely SPICE PC Analog/Digital Pspice, CaptureStimuls editor,pspice A/D,Probe 11,000 Analog library 2,000 Digital library Vendor Pspice library model Simulation 1Schematic Entry -Schematic: -Stimulus Editor: 2 Analysis Setup &Simulate: -Pspice A/D: A/D 3Output -Probe:,,, -Text editor:netlist,output file text format Analog Simulation with PSpice page v
5
6 Simulation Goals: Lesson 1 schematic : symbol, wires, attributes, Source, design Schematics (Menu Bar) (Toolbar) (shortcuts) (Drawing Area ) Schematic Analog Simulation with PSpice page 1
7 Lesson 1-Entering a Design for Simulation Browser dialog Place/Part <SHIFT-P> Hot key Tool Bar Button Part Browser dialog 1 Part Name (Browser ) 2 OK symbol cursor 3 click page copy 4 click page 2 Analog Simulation with PSpice
8 Lesson 1-Entering a Design for Simulation Notes: click copy Recent Part box Part Browser Wild card Part Browser dialog wild card 4000 *4000*? parts browser help 1 click 2 Edit/Rotate <CTRL-R> Draw/Wire toolbar button <SHIFT-W> Hot key drawing mode cursor 1 click wire 2 click wire drawing mode 3 click click drawing mode Analog Simulation with PSpice page 3
9 Lesson 1-Entering a Design for Simulation Options/Display Options: COLOR GRID PAN/ZOOM SELECT, TEXT,TAB X / Y on /off properties ( DC voltage ) symbol ( click) Edit/Properties symbol Property Editor dialog page 4 Analog Simulation with PSpice
10 Lesson 1-Entering a Design for Simulation Property 1 Property 2 Apply 3 OK dialog Note: attribute asterisk attribute attributes Symbol Editor schematic click Set Attribute Value dialog Property Display Values Property Display Values 1 Property dialog 2 3display preferences, orientation, and justification 4 Apply Analog Simulation with PSpice page 5
11 Lesson 1-Entering a Design for Simulation netlister (label) Probe node Analog Behavioral Model (ABM) device node : 1 Property Editor dialog 2 node Net Alias 3 OK Note: Node,, %, &, * page 6 Analog Simulation with PSpice
12 Lesson 1-Entering a Design for Simulation Exercise circuit voltage source 1 Place/Part (type <SHIFT-P >, toolbar button) 2 Part dialog VDC 3 Click OK <Enter> 4 source 5 resistors 1 Place/Part (<SHIFT-P>, toolbar button) 2 Add Part dialog R 3 OK 4 (R1) OK 5 <CTRL-R> resistor 6 (R2) 7 capacitor 1 Place/Part (<SHIFT-P>, toolbar button) 2 Add Part dialog C 3 OK <Enter> Analog Simulation with PSpice page 7
13 Lesson 1-Entering a Design for Simulation 4 <CTRL-R> capacitor 5 capacitor 6 NOTE <Pspice library file> Pspice model library,symbol library 1model library -analog/digital device definition file -file name: *lib -ASCII text file(model subcircuit ) - symbol library 2symbol library - file -file name: *olb -device page 8 Analog Simulation with PSpice
14 Lesson 1-Entering a Design for Simulation Components 1 Place/Wire (<SHIFT-W>,toolbar button) 2 Delete key Placing the analog ground symbol 1 Place/Part (<SHIFT-P>,toolbar button) 2 OK 3 ground symbol 4 1 C1 2 Property Editor reference box CAP1 3 OK <Enter> labels 1 V1 R1 2 Property Editor name box In 3 OK 4 R1, R2 CAP1 5 Property Editor name box Out 6 OK Voltage source 10V 1 source (0V) 2 Display Propert Value 10V 3 OK schematic 1 File/Save 2 FILE rcopj 3 OK Analog Simulation with PSpice page 9
15
16 Bias Point Analysis Goals: simulation menu, netlist, Lesson 2 Analysis Setup RC DC bias point analysis simulation DC bias Simulation Setting Pspice/Simulation Setting Bias Point Detail enabled Bias Point Detail outfile bias point Analog Simulation with PSpice page 11
17 Lesson 2-Bias Point Analysis Netlisting PSpice netlist PSpice/Create Netlist Electrical Rule Check (ERC) ERC errors netlist simulation Analysis/Examine Netlist Notes: netlisting simulation ERC netlisting commands <Pspice option> Optimizer : Option,,, Option page 12 Analog Simulation with PSpice
18 Lesson 2-Bias Point Analysis Simulating PSpice Pspice/Run,, Run simulation PSpice window Simulation Probe waveform Analog Simulation with PSpice page 13
19 Lesson 2-Bias Point Analysis Analysis/Examine Output errors, output file output file bias voltages dc circuit 2 voltage RC V1 negative V CAP1 = R 2 /(R 1 + R 2 ) x V1 page 14 Analog Simulation with PSpice
20 Lesson 2-Bias Point Analysis Exercise 1 rcopj 2 Analysis/Setup, toolbar button ( Bias Point enabled ) 3 Close 4 PSpice/Run simulation toolbar button ERC netlister 5 Probe window View/Output File output file Extra Credit 1 ground symbol simulate error? 2 Message Viewer error 3 message viewer 4 Highlight error <F1> Message Viewer troubleshooting errors Analog Simulation with PSpice page 15
21
22 DC Sweep Lesson 3 Goals: DC Sweep analysis, set up sources, Probe,markers DC Sweep analysis PSpice,, steady output file Probe DC Sweep Analysis setup 1 Simulation Setting dialog DC Sweep button DC Sweep dialog 2 3 Value List Value field list 4 5 nested sweep,nested Sweep button Nested DC Sweep dialog 2-4 Analog Simulation with PSpice page 17
23 Lesson 3-DC Sweep DC sweep DC attribute zero sources 1 source (0V) vlaue 2 value 3 OK markers Markers Probe trace node voltage level, node voltage markers voltage current, markers 1 PSpice/Marker menu 2 3 marker marker 3 node (voltage markers) pin hot spot (current markers) click 4 Voltage differential markers marker positive node negative node, marker 10V node 5V 5V markers 5V advanced markers 1 PSpice menu 2 Mark Advanced 3 marker type 4 marker marker Probe Probe waveform viewer software oscilloscope group delay, voltage, current, (AC Analysis only) node voltage currnet page 18 Analog Simulation with PSpice
24 Lesson 3-DC Sweep Probe Probe Setup tab display Probe PSpice/Edit Simulation Settings Probe Setup Options dialog Probe Startup tab simulation Probe Probe startup tab Probe starts dialog values Analog Simulation with PSpice page 19
25 Lesson 3-DC Sweep Data Collection tab simulation At markers only marker All voltage current None simulation CSDF checkbox probe data file simulation spreadsheet math program Edit/Copy command data export Excel simulation Probe setup page 20 Analog Simulation with PSpice
26 Lesson 3-DC Sweep Exercise sweep V1 0V 10V 1V 1 PSpice/Edit Simulation Setting 2 DC Sweep button 3 Swept Variable Type Voltage Source 4 Sweep Type Linear 5 NAME text box V1 field value V1 6 Start Value text box 0 7 End Value text box <Tab> 10 8 Increment text box <Tab> 1 9 OK 10 Close Analysis Setup dialog 11 Check PSpice/Edit Simlation Setting Probe Setup data Probe run 12 Run toolbar button simulation PSpice/Run menu item Probe Probe window marker trace markers blank Plot traces Trace/Add <Ins> toolbar Add Trace button 1Add Trace list box 1V(In) V(Out) trace Trace Expression box Traces display 2OK traces display Analog Simulation with PSpice page 21
27 Lesson 3-DC Sweep Markers Plot traces display traces marker 1 X V(In) 2 <Shift> key V(Out) traces 3 <Delete> key display traces 4 <Alt-Tab> Schematics window 5 PSpice/Markers/Voltage Level 6 node In marker 7 node Out marker 8 click placement mode 9 Probe window Probe display of DC Sweep page 22 Analog Simulation with PSpice
28 AC Sweep Lesson 4 Goals: AC analysis, AC sources, Probe, markers AC Sweep analysis, PSpice small-signal voltage Bode plot AC Sweep signal analysis 100 1V 100V nonlinear effects simulation Analog Simulation with PSpice page 23
29 Lesson 4-AC Sweep AC Sweep Analysis setup Analysis Setup dialog AC Sweep/Noise sweep type Total Pts Field points number linear sweep point number frequency swept Octave Decade sweeps points number octave decade point OK Exit Noise analysis blank page 24 Analog Simulation with PSpice
30 Lesson 4-AC Sweep AC Sweep analysis AC source, source AC attribute value AC sources, AC source DC source 1 VAC source 2 ACMAG attribute Porperty Editor list 3 Value field phase shift AC voltage current value filed vlaue format <AC magnitude> <Phase shift> 5 volts 90 degree phase shift 5V, 90 4 Apply button Probe Probe simulation table Suffix Meaning of Output Variables for AC analysis None Magnitude DB Magnitude in decibels G Group delay (-dphase/dfrequency) I Imaginary part M Magnitude P Phase in degrees R Real part Examples Meaning of Output Variables II(R13) Imaginary part of the current through R13 IGG(m3) Group delay of M3 s gate current IR(VIN) Real part if I (current) through VIN IAG(T2) Group delay of current at port A of T2 V(2,3) Magnitude of complex voltage across nodes 2 & 3 VDB(R1) Db magnitude of V across R1 VBEP(Q3) Phase of base-emitter V at Q3 VM(2) Magnitude of V at node 2 Analog Simulation with PSpice page 25
31 Lesson 4-AC Sweep Probe Function Description Available in PSpice A/D? ABS(x) x YES SGN(x) +1 (if x>0), 0(if x=0), -1(if YES x<0) SQRT(x) x1/2 YES EXP(x) e x YES LOG(x) ln(x) YES LOG10(x) log(x) YES M(x) magnitude of x YES P(x) phase of x(degrees) YES R(x) Real part of x YES IMG(x) Imaginary part of x YES G(x) Group delay of x (seconds) NO PWR(x,y) x y YES SIN(x) sin(x) YES COS(x) cos(x) YES TAN(x) tan(x) YES ATAN(x) tan -1 YES ARCTAN(x) d(x) Derivative of x with respect YES* to the x-axis variable s(x) Integral of x over the range YES** of the x-axis variable AVG(x) running average of x over NO the range of the x-axis variable AVGX(x,d) running average of x from NO X_axis_value(x)-d to X_axis_value(x) RMS(x) Running RMS average of x NO over the range of the x-axis variable DB(x) Magnitude in decibels of x NO MIN(x) Minimum of the real part of NO x MAX(x) Maximum of the real part of x NO * In PSpice A/D, this function is called DDT(x) ** In PSpice A/D, this function is called SDT(x) Note AC analysis Probe s magnitude display page 26 Analog Simulation with PSpice
32 Lesson 4-AC Sweep Exercise Clipper circuit 1 circuit R, C, VDC, VAC, D1N3940, EGND, BUBBLE reference designators caps resistors label 2 Markers/Advanced marker vdb 3 Clipperopj Analog Simulation with PSpice page 27
33 Lesson 4-AC Sweep AC sweep simulation 1 PSpice Edit Simulation Settings 2 Simulation Settings dialog box AC Sweep 3 AC sweep 4 OK Simulation Settings dialog box 5 Close Analysis Setup dialog box 6 PSpice menu Run, simulate toolbar button UNIT Scale Symbol Name T, t Tera G, g Giga MEG, Meg, meg Mega K, k Kilo- C, c Clock cycle (digital) 10-3 M,m Milli- 254*10-6 MIL, Mil, mil mil 10-6 U,u Micro N,n Nano P,p Pico F,f Femto- page 28 Analog Simulation with PSpice
34 Lesson 4-AC Sweep Probe Probe marker net voltage db magnitude (20log10) Out Mid VDB(Mid), capacitance load resistor VDB(Out) bandpass response linear analysis AC 1V ( ) Analog Simulation with PSpice page 29
35 Lesson 4-AC Sweep Bode plot 1 Schematics PSpice/Markers/Mark Advanced 2 Out Vdb Vphase marker 3 Mid Vdb marker 4 Probe window plots 5 VP(Out) 6 Edit/Cut Cut toolbar button 7 Plot/Add Y Axis 8 Edit/Paste bode plot Bode Plot of Clipper s Frequency Response page 30 Analog Simulation with PSpice
36 Stimulus Editor Goals: stimulus source symbols /, stimulis (PWL, sin wave, clock, bus), configure & unconfigure stimulus file Stimulus Editor (StmEd) transient analog digital sources PSpice source SIN, PWL, SFFM, Exponential, Pulse, digital Signals stimuli ASCII file file configured schematic simulation stimulus file local global Schematics 3 stimulus symbols stimuls type Vstim StmEd voltage sources Lesson 5 Istim StmEd current sources Analog Simulation with PSpice page 31
37 Lesson 5-Stimulus Editor Digstim StmEd digital sources Simulation Settings dailog stimulus schematic stl directory file local stimulus file PSpice/Edit Simulation Settings Library tab dialog stimulus files configure page 32 Analog Simulation with PSpice
38 Lesson 5-Stimulus Editor Exercise 1 Sin Wave Stimulus 1 Schematics dsn pop-up New Schematic 2 VSTIM 3 STIMULUS= text 60_hz_sin 4 STIMTEST file 5 VSTIM Edit/PSpice Stimulus stimuls dialog 6 SIN radio 7 OK 8 dialog Offset 0 Amplitude 5 Frequency 60 amplitude peak-to-peak 9 OK 60Hz sine sin wave 10 File Save toolbar button 11 Schematics PSpice/Edit Simulation Setting Library tab Analog Simulation with PSpice page 33
39 Lesson 5-Stimulus Editor Exercise 2 Piecewise Linear Stimulus exercise exercise one Stimulus Editor 1 StmEd window 2 Stimulus/New 3 Name MYPWL 4 PWL radio button 5 OK button cursor 6 Axis Setting toolbar button 7 X 2m 8 Y 01 9 OK button 10 cursor window X Y 11 (2m, 0) data point square marker ( vertex) 12 (4m, 25) (6m, 2,5) (8m, 0) (10m, 0) (12m, -25) (14m, -25) (16m, 0) (18m, 0) (20m, 25) (22m, 2,5) (24m, 0) (26m, 0) (28m, -25) (30m, -25) (32m, 0) (34m, 0) (36m, 5) (38m, 2,5) (40m, 0) (42m, 0) 13 placement mode page 34 Analog Simulation with PSpice
40 Lesson 5-Stimulus Editor Correcting mistakes PWL stimulus points points ( vetices) Point 1 vertex 2, vertex 1 point 2 delete key delete Vertex 1 Add New Point toolbar button 2 new point 3 placement mode Analog Simulation with PSpice page 35
41
42 Transient Analysis Lesson 6 Goals transient analysis,stimulus Editor,Probe Transient analysis time domain simulation transient Probe oscilloscope Time x swept voltage current y Print Step VPRINT or VPLOT printing plotting Print Step Probe Final Time simulation transient simulations TIME=0 Final Time No-Print Delay time period Step Ceiling simulator step size waveform convergence error Detailed Bias Pt transient bias solution Analog Simulation with PSpice page 37
43 Lesson 6-Transient Analysis A note on Bias calculations: simulation DC bias calculation OP bias calculation transient analysis transient bias DC value ( source AC, DC, transient component) source TIME=0 OP bias calculation DC value transient bias e source TIME = 0 source Exercise 1 1 rcdsn 2 DC source Vstim source 3 attribute MYOULSE pulse source StmEd 4 StmEd file StmEd 5 PSpice/Edit Simulation Settings DC Sweep 6 Transient Analysis final time 5u Probe Print Step 7 OK 8 Close button setup dialog 9 Run toolbar button simulation 10 IN OUT net marker schematic markers ( simulate ), Probe traces (V(IN) V(OUT)) Add Trace toolbar button 11 schematic fil page 38 Analog Simulation with PSpice
44 Lesson 6-Transient Analysis waveforms ramps steady state Probe display of transient RC simulation Analog Simulation with PSpice page 39
45 Lesson 6-Transient Analysis Exercise 2 1 rcdsn LF411, Bubble, VDC refergators component values 2 File/Save As opampdsn 3 transient analysis stimulus file PSpice/Edit Simulation Settings library tab 4 simulation run 5 Probe Add Trace toolbar button I(CAP1) 6 Plot/Add Y Axis Y 7 trace I(CAP2) 8 Plot/Axis Settings Y labels 9 pulldown box Y list 1 10 CAP1 Current 11 Y list 2 12 CAP2 Current 13 OK dialog page 40 Analog Simulation with PSpice
46 Lesson 6-Transient Analysis Note: Y >>,, Multiple Y axis plot Analog Simulation with PSpice page 41
47
48 Parametric Analysis Lesson 7 Goals: global parameter, parametric simulation Probe, Parametric analysis Parametric analysis parameter parameters voltage source, current source, temperature, model parameter, global parameter Parametric analysis parameter parameter list linear, octave, decade sweep A parametric analysis basic analysis type AC Sweep, DC Sweep, transient simulations enabled parametric analysis parameter simulation global parameter model parameter parametric DC Sweep Probe parametric analysis curves parametric analysis global parameter component value, model value, Analog Behavioral Modeling expression analysis specification (AC Sweep, DC Sweep, or transient) parametric analysis specification design simulate Probe Analog Simulation with PSpice page 43
49 Lesson 7-Parametric Analysis Exercise Opampsch global parameter 1 Place/Part 2 PARAM part name 3 Ok 4 PARAM component placement mode 5 PARAMETERS : symbol attribute 6 NAME1 CVAL Apply button 7 VALUE1 1n Apply button 1n 8 OK dialog box page 44 Analog Simulation with PSpice
50 Lesson 7-Parametric Analysis attribute value global parameter 1 CAP2 ( 1n) 2 {CVAL} 3 OK model parameter component (resistors, capciture,inductors ) simulation { } PSpice, 1n { CAP2} CAP2 PSpice CVAL CVAL parameter simulation PSpice/Edit Simulation Seetings 1 Parameter Analysis 2 Global Parameter radio button sweep parameter 3 Name parameter {} 4 Linear radio button linear sweep 5 Start Value parameter 100p 6 End Value 700p 7 Increment 25p 8 OK dialog parametric analysis 9 transient analysis configure Run Analog Simulation with PSpice page 45
51 Lesson 7-Parametric Analysis Probe CAP2 25 transient analysis 25 list option OK 25 traces 1 <alt-tab> 2 PSpice/Markers/Mark Current into Pin 3 CAP2 marker 4 <alt-tab> Probe 25 traces CAP2 100p 700p 1 X I(CAP2) <delete> 25 traces 2 Add Trace toolbar button 3 space trace command I(CAP2)@25 trace list I(CAP2) command box field peak value Pobe peak search Add Trace toolbar button 2 Trace command I(CAP2)@25 I(CAP2)@1 3 OK 4 Toggle Cursor toolbar button 5 I(CAP2)@25 I(CAP2)@1 page 46 Analog Simulation with PSpice
52 Lesson 7-Parametric Analysis 6 Cursor Peak toolbar button cursor box Y u CAP2 700pF,CAP2 144uA CAP2 100pF Probe Performance Analysis Performance Analysis search commands functions Add Trace search command CAP2 capacitance performance analysis PSpice A/D & Basics+ User s Guide performance analysis Extra Credit: Probe use Trace/Performance Analysis/Wizard I(CAP2) Y PLOT CVAL Analog Simulation with PSpice page 47
53
54 Analog Simulation with PSpice page 49
Orcad Capture 9.x
OrCAD Capture Workbook (Ver 10.xx) 0 Capture 1 2 3 Capture for window 4.opj ( OrCAD Project file) Design file Programe link file..dsn (OrCAD Design file) Design file..olb (OrCAD Library file) file..upd
More informationMAX+plus II Getting Started - 무작정따라하기
무작정 따라하기 2001 10 4 / Version 20-2 0 MAX+plus II Digital, Schematic Capture MAX+plus II, IC, CPLD FPGA (Logic) ALTERA PLD FLEX10K Series EPF10K10QC208-4 MAX+plus II Project, Schematic, Design Compilation,
More information,,,,,, (41) ( e f f e c t ), ( c u r r e n t ) ( p o t e n t i a l difference),, ( r e s i s t a n c e ) 2,,,,,,,, (41), (42) (42) ( 41) (Ohm s law),
1, 2, 3, 4, 5, 6 7 8 PSpice EWB,, ,,,,,, (41) ( e f f e c t ), ( c u r r e n t ) ( p o t e n t i a l difference),, ( r e s i s t a n c e ) 2,,,,,,,, (41), (42) (42) ( 41) (Ohm s law), ( ),,,, (43) 94 (44)
More information4 CD Construct Special Model VI 2 nd Order Model VI 2 Note: Hands-on 1, 2 RC 1 RLC mass-spring-damper 2 2 ζ ω n (rad/sec) 2 ( ζ < 1), 1 (ζ = 1), ( ) 1
: LabVIEW Control Design, Simulation, & System Identification LabVIEW Control Design Toolkit, Simulation Module, System Identification Toolkit 2 (RLC Spring-Mass-Damper) Control Design toolkit LabVIEW
More information<4D F736F F F696E74202D20C0FCC0DAC8B8B7CEBDC7C7E8312E BC8A3C8AF20B8F0B5E55D>
전자회로실험 (PSPICE 사용법 ) 대진대학교전자공학과 2010년 2 학기 Lecture #1 2010. 09. 10 목차 PSPICE 사용법 Q&A 공지사항 2 1 PSPICE의전체과정 1. 회로도그리기 (Schematic) (1) 소자가져오기 (Draw) (2) 결선 (Wire) (3) 기준 node의접지 2.Simulation (1) 조건설정 (Simulation/Setup)
More informationSlide 1
Clock Jitter Effect for Testing Data Converters Jin-Soo Ko Teradyne 2007. 6. 29. 1 Contents Noise Sources of Testing Converter Calculation of SNR with Clock Jitter Minimum Clock Jitter for Testing N bit
More informationuntitled
R&S Power Viewer Plus For NRP Sensor 1.... 3 2....5 3....6 4. R&S NRP...7 -.7 - PC..7 - R&S NRP-Z4...8 - R&S NRP-Z3... 8 5. Rohde & Schwarz 10 6. R&S Power Viewer Plus.. 11 6.1...12 6.2....13 - File Menu...
More informationMentor_PCB설계입문
Mentor MCM, PCB 1999, 03, 13 (daedoo@eeinfokaistackr), (kkuumm00@orgionet) KAIST EE Terahertz Media & System Laboratory MCM, PCB (mentor) : da & Summary librarian jakup & package jakup & layout jakup &
More information<4D6963726F736F667420506F776572506F696E74202D204D41544C4142B0ADC0C7B7CF28B9E8C6F7BFEB295F3031C0E55FBDC3C0DBC7CFB1E22E707074205BC8A3C8AF20B8F0B5E55D>
MATLAB MATLAB 개요와 응용 1장 MATLAB 시작하기 10 5 0 황철호 -5-10 30 20 10 0 0 5 10 15 20 25 MATLAB 시작하기 이장의내용 MATLAB의여러창(window)들의 특성과 목적 기술 스칼라의 산술연산 및 기본 수학함수의 사용. 스칼라 변수들(할당 연산자)의 정의 및 변수들의 사용 방법 스크립트(script) 파일에
More informationMCM, PCB (mentor) : da& librarian jakup & package jakup & layout jakup & fablink jakup & Summary 2 / 66
Mentor MCM, PCB 1999, 03, 13 KAIST EE Terahertz Media & System Laboratory MCM, PCB (mentor) : da& librarian jakup & package jakup & layout jakup & fablink jakup & Summary 2 / 66 1999 3 13 ~ 1999 3 14 :
More informationMicrosoft PowerPoint - 기계공학실험1-1MATLAB_개요2D.pptx
1. MATLAB 개요와 활용 기계공학실험 I 2013년 2학기 MATLAB 시작하기 이장의내용 MATLAB의여러창(window)들의 특성과 목적 기술 스칼라의 산술연산 및 기본 수학함수의 사용. 스칼라 변수들(할당 연산자)의 정의 및 변수들의 사용 방법 스크립트(script) 파일에 대한 소개와 간단한 MATLAB 프로그램의 작성, 저장 및 실행 MATLAB의특징
More informationfx-82EX_fx-85EX_fx-350EX
KO fx-82ex fx-85ex fx-350ex http://edu.casio.com RJA532550-001V01 ...2... 2... 2... 3... 4...5...5...6... 8... 9...10... 10... 11... 13... 16...17...17... 17... 18... 20 CASIO Computer Co., Ltd.,,, CASIO
More information(Transer Function) X(w) Y(w) H(w) Y(w) X(w) H ( w) φ H(w) H(w) X(w) Y(w). Vo ( w) H v ( w) V ( w) I o( w) H i ( w) I ( w) V ( w) H z ( w) I ( w) I ( w
4 Bode plot( ) Pspice The McGraw-Hill Copanies, Inc.,? A(j) db A db. A 3 db,, ΘG(), L 9 o 8. o L H H (rad/s) (rad/s) : 3 3 : 35~ The McGraw-Hill Copanies, Inc., (Transer Function) X(w) Y(w) H(w) Y(w) X(w)
More informationMicrosoft PowerPoint - ICCAD_Analog_lec01.ppt [호환 모드]
Chapter 1. Hspice IC CAD 실험 Analog part 1 Digital circuit design 2 Layout? MOSFET! Symbol Layout Physical structure 3 Digital circuit design Verilog 를이용한 coding 및 function 확인 Computer 가알아서해주는 gate level
More informationCD-RW_Advanced.PDF
HP CD-Writer Program User Guide - - Ver. 2.0 HP CD-RW Adaptec Easy CD Creator Copier, Direct CD. HP CD-RW,. Easy CD Creator 3.5C, Direct CD 3.0., HP. HP CD-RW TEAM ( 02-3270-0803 ) < > 1. CD...3 CD...5
More informationSmart Power Scope Release Informations.pages
v2.3.7 (2017.09.07) 1. Galaxy S8 2. SS100, SS200 v2.7.6 (2017.09.07) 1. SS100, SS200 v1.0.7 (2017.09.07) [SHM-SS200 Firmware] 1. UART Command v1.3.9 (2017.09.07) [SHM-SS100 Firmware] 1. UART Command SH모바일
More informationuntitled
1... 2 System... 3... 3.1... 3.2... 3.3... 4... 4.1... 5... 5.1... 5.2... 5.2.1... 5.3... 5.3.1 Modbus-TCP... 5.3.2 Modbus-RTU... 5.3.3 LS485... 5.4... 5.5... 5.5.1... 5.5.2... 5.6... 5.6.1... 5.6.2...
More informationPRO1_09E [읽기 전용]
Siemens AG 1999 All rights reserved File: PRO1_09E1 Information and - ( ) 2 3 4 5 Monitor/Modify Variables" 6 7 8 9 10 11 CPU 12 Stop 13 (Forcing) 14 (1) 15 (2) 16 : 17 : Stop 18 : 19 : (Forcing) 20 :
More informationSW_faq2000번역.PDF
FREUENTLY ASKED UESTIONS ON SPEED2000 Table of Contents EDA signal integrity tool (vias) (via) /, SI, / SPEED2000 SPEED2000 EDA signal integrity tool, ( (via),, / ), EDA, 1,, / 2 FEM, PEEC, MOM, FDTD EM
More informationCoriolis.hwp
MCM Series 주요특징 MaxiFlo TM (맥시플로) 코리올리스 (Coriolis) 질량유량계 MCM 시리즈는 최고의 정밀도를 자랑하며 슬러리를 포함한 액체, 혼합 액체등의 질량 유량, 밀도, 온도, 보정된 부피 유량을 측정할 수 있는 질량 유량계 이다. 단일 액체 또는 2가지 혼합액체를 측정할 수 있으며, 강한 노이즈 에도 견디는 면역성, 높은 정밀도,
More informationRemote UI Guide
Remote UI KOR Remote UI Remote UI PDF Adobe Reader/Adobe Acrobat Reader. Adobe Reader/Adobe Acrobat Reader Adobe Systems Incorporated.. Canon. Remote UI GIF Adobe Systems Incorporated Photoshop. ..........................................................
More informationORANGE FOR ORACLE V4.0 INSTALLATION GUIDE (Online Upgrade) ORANGE CONFIGURATION ADMIN O
Orange for ORACLE V4.0 Installation Guide ORANGE FOR ORACLE V4.0 INSTALLATION GUIDE...1 1....2 1.1...2 1.2...2 1.2.1...2 1.2.2 (Online Upgrade)...11 1.3 ORANGE CONFIGURATION ADMIN...12 1.3.1 Orange Configuration
More information강의10
Computer Programming gdb and awk 12 th Lecture 김현철컴퓨터공학부서울대학교 순서 C Compiler and Linker 보충 Static vs Shared Libraries ( 계속 ) gdb awk Q&A Shared vs Static Libraries ( 계속 ) Advantage of Using Libraries Reduced
More information歯FDA6000COP.PDF
OPERATION MANUAL AC Servo Drive FDA6000COP [OPERATION UNIT] Ver 1.0 (Soft. Ver. 8.00 ~) FDA6000C Series Servo Drive OTIS LG 1. 1.1 OPERATION UNIT FDA6000COP. UNIT, FDA6000COP,,,. 1.1.1 UP DOWN ENTER 1.1.2
More informationairDACManualOnline_Kor.key
5F InnoValley E Bldg., 255 Pangyo-ro, Bundang-gu, Seongnam-si, Gyeonggi-do, Korea (Zip 463-400) T 031 8018 7333 F 031 8018 7330 airdac AD200 F1/F2/F3 141x141x35 mm (xx) 350 g LED LED1/LED2/LED3 USB RCA
More information1 Nov-03 CST MICROWAVE STUDIO Microstrip Parameter sweeping Tutorial Computer Simulation Technology
1 CST MICROWAVE STUDIO Microstrip Parameter sweeping Tutorial Computer Simulation Technology wwwcstcom wwwcst-koreacokr 2 1 Create a new project 2 Model the structure 3 Define the Port 4 Define the Frequency
More informationChapter4.hwp
Ch. 4. Spectral Density & Correlation 4.1 Energy Spectral Density 4.2 Power Spectral Density 4.3 Time-Averaged Noise Representation 4.4 Correlation Functions 4.5 Properties of Correlation Functions 4.6
More informationMicrosoft PowerPoint - analogic_kimys_ch10.ppt
Stability and Frequency Compensation (Ch. 10) 김영석충북대학교전자정보대학 2010.3.1 Email: kimys@cbu.ac.kr 전자정보대학김영석 1 Basic Stability 10.1 General Considerations Y X (s) = H(s) 1+ βh(s) May oscillate at ω if βh(jω)
More information歯DCS.PDF
DCS 1 DCS - DCS Hardware Software System Software & Application 1) - DCS System All-Mighty, Module, ( 5 Mbps ) Data Hardware : System Console : MMI(Man-Machine Interface), DCS Controller :, (Transmitter
More informations SINUMERIK 840C Service and User Manual DATA SAVING & LOADING & & /
SINUMERIK 840C Service and Uer Manual DATA SAVING & LOADING & & / / NC, RS232C /. NC NC / Computer link () Device ( )/PC / / Print erial Data input RS232C () Data output Data management FLOPPY DRIVE, FLOPPY
More information歯AG-MX70P한글매뉴얼.PDF
120 V AC, 50/60 Hz : 52 W (with no optional accessories installed), indicates safety information. 70 W (with all optional accessories installed) : : (WxHxD) : : 41 F to 104 F (+ 5 C to + 40 C) Less than
More information歯Intro_alt_han_s.PDF
ALTERA & MAX+PLUS II ALTERA & ALTERA Device ALTERA MAX7000, MAX9000 FLEX8000,FLEX10K APEX20K Family MAX+PLUS II MAX+PLUS II 2 Altera & Altera Devices 4 ALTERA Programmable Logic Device Inventor of the
More informationMicrosoft PowerPoint - ch03ysk2012.ppt [호환 모드]
전자회로 Ch3 iode Models and Circuits 김영석 충북대학교전자정보대학 2012.3.1 Email: kimys@cbu.ac.kr k Ch3-1 Ch3 iode Models and Circuits 3.1 Ideal iode 3.2 PN Junction as a iode 3.4 Large Signal and Small-Signal Operation
More information10X56_NWG_KOR.indd
디지털 프로젝터 X56 네트워크 가이드 이 제품을 구입해 주셔서 감사합니다. 본 설명서는 네트워크 기능 만을 설명하기 위한 것입니다. 본 제품을 올바르게 사 용하려면 이 취급절명저와 본 제품의 다른 취급절명저를 참조하시기 바랍니다. 중요한 주의사항 이 제품을 사용하기 전에 먼저 이 제품에 대한 모든 설명서를 잘 읽어 보십시오. 읽은 뒤에는 나중에 필요할 때
More informationuntitled
Push... 2 Push... 4 Push... 5 Push... 13 Push... 15 1 FORCS Co., LTD A Leader of Enterprise e-business Solution Push (Daemon ), Push Push Observer. Push., Observer. Session. Thread Thread. Observer ID.
More informationWeek3
2015 Week 03 / _ Assignment 1 Flow Assignment 1 Hello Processing 1. Hello,,,, 2. Shape rect() ellipse() 3. Color stroke() fill() color selector background() 4 Hello Processing 4. Interaction setup() draw()
More informationVOL.76.2008/2 Technical SmartPlant Materials - Document Management SmartPlant Materials에서 기본적인 Document를 관리하고자 할 때 필요한 세팅, 파일 업로드 방법 그리고 Path Type인 Ph
인터그래프코리아(주)뉴스레터 통권 제76회 비매품 News Letters Information Systems for the plant Lifecycle Proccess Power & Marine Intergraph 2008 Contents Intergraph 2008 SmartPlant Materials Customer Status 인터그래프(주) 파트너사
More information마이크로시스템제작 lecture1. 강의소개및 MultiSIM 선덕한 마이크로시스템 1
마이크로시스템제작 lecture1. 강의소개및 MultiSIM 선덕한 마이크로시스템 1 1. 강의소개 1.1 목표 Ø 강의소개 Ø MultiSIM 소개및기본 Tool 사용방법 1.2 강의평가방법 Ø 출석 20% Ø 과제물 50% (Term Project) Ø 기말고사 20% Ø 수업참여도 10% 마이크로시스템 2 1.3 연락처 E-Mail : sundukhan@hanmail.net
More information전자실습교육 프로그램
제 5 장 신호의 검출 측정하고자 하는 신호원에서 발생하는 신호를 검출(detect)하는 것은 물리측정의 시작이자 가장 중요한 일이라고 할 수가 있습니다. 그 이유로는 신호의 검출여부가 측정의 성패와 동의어가 될 정도로 밀접한 관계가 있기 때문입니다. 물론 신호를 검출한 경우라도 제대로 검출을 해야만 바른 측정을 할 수가 있습니다. 여기서 신호의 검출을 제대로
More information03 장태헌.hwp
THE JOURNAL OF KOREAN INSTITUTE OF ELECTROMAGNETIC ENGINEERING AND SCIENCE. 2013 Aug.; 24(8), 772 780. http://dx.doi.org/10.5515/kjkiees.2013.24.8.772 ISSN 1226-3133 (Print) ISSN 2288-226X (Online) HEMP
More information歯메뉴얼v2.04.doc
1 SV - ih.. 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 - - - 23 24 R S T G U V W P1 P2 N R S T G U V W P1 P2 N R S T G U V W P1 P2 N 25 26 DC REACTOR(OPTION) DB UNIT(OPTION) 3 φ 220/440 V 50/60
More informationMPLAB C18 C
MPLAB C18 C MPLAB C18 MPLAB C18 C MPLAB C18 C #define START, c:\mcc18 errorlevel{0 1} char isascii(char ch); list[list_optioin,list_option] OK, Cancel , MPLAB IDE User s Guide MPLAB C18 C
More informationMicrosoft Word - Installation and User Manual_CMD V2.2_.doc
CARDMATIC CMD INSTALLATION MANUAL 씨앤에이씨스템(C&A SYSTEM Co., Ltd.) 본사 : 서울특별시 용산구 신계동 24-1(금양빌딩 2층) TEL. (02)718-2386( 代 ) FAX. (02) 701-2966 공장/연구소 : 경기도 고양시 일산동구 백석동 1141-2 유니테크빌 324호 TEL. (031)907-1386
More informationMicrosoft PowerPoint - 전자공학 실험 3강 - PSpice.PPT
기초전자실험 PSpice 2005. 9. 30. Pspice 기초 - 설치 - 사용법 -LPF 설계 Pspice 란? SPICE(Simulation Program with Integrated Circuit Emphasis) 전자회로컴퓨터시뮬레이션툴임. 실제로전기, 전자, 디지털회로를제작하기전에, 컴퓨터를이용하여계산하고, 측정, 평가하여해석및설계를하는툴 Pspice
More informationLCD Display
LCD Display SyncMaster 460DRn, 460DR VCR DVD DTV HDMI DVI to HDMI LAN USB (MDC: Multiple Display Control) PC. PC RS-232C. PC (Serial port) (Serial port) RS-232C.. > > Multiple Display
More informationMicrosoft Word - CL5000,5500_KOR_UM_20110321_.doc
2 차 례 1. 주의 사항... 8 1.1 취급주의... 8 2. Specification... 10 2.1 소개... 10 2.2 규격... 12 3. 명칭과 기능... 14 3.1 CL 5000 - P Type... 14 3.2 기본 설치... 18 3.3 표시부... 19 3.4 기능키... 20 3.5 라벨롤의 설치... 24 4. PROGRAMMING...
More information00 SPH-V6900_....
SPH-V6900 사용설명서 사용전에 안전을 위한 경고 및 주의사항을 반드시 읽고 바르게 사용해 주세요. 사용설명서의 화면과 그림은 실물과 다를 수 있습니다. 사용설명서의 내용은 휴대전화의 소프트웨어 버전 또는 KTF 사업자의 사정에 따라 다를 수 있으며, 사용자에게 통보없이 일부 변경될 수 있습니다. 휴대전화의 소프트웨어는 사용자가 최신 버전으로 업그레이드
More informationTRIBON 실무 DRAFT 편 조선전용 CAD에 대한 기초적인 사용 방법 기술 기술지원팀
TRIBON 실무 DRAFT 편 조선전용 CAD에 대한 기초적인 사용 방법 기술 기술지원팀 1. 1-1) TRIBON 1-2) 2D DRAFTING OVERVIEW 1-3) Equipment Pipes Cables Systems Stiffeners Blocks Assemblies Panels Brackets DRAWINGS TRIBON Model Model
More information5. Kapitel URE neu
URE Fuses for Semiconductor Protection European-British Standard Standards: IEC 60 269-4 BS 88-4 Class: ar Voltage ratings: AC 240 V AC 700 V Current ratings: 5 A 900 A Features / Benefits High interrupting
More information<313630313032C6AFC1FD28B1C7C7F5C1DF292E687770>
양성자가속기연구센터 양성자가속기 개발 및 운영현황 DOI: 10.3938/PhiT.25.001 권혁중 김한성 Development and Operational Status of the Proton Linear Accelerator at the KOMAC Hyeok-Jung KWON and Han-Sung KIM A 100-MeV proton linear accelerator
More informationARMBOOT 1
100% 2003222 : : : () PGPnet 1 (Sniffer) 1, 2,,, (Sniffer), (Sniffer),, (Expert) 3, (Dashboard), (Host Table), (Matrix), (ART, Application Response Time), (History), (Protocol Distribution), 1 (Select
More informationSolaris Express Developer Edition
Solaris Express Developer Edition : 2008 1 Solaris TM Express Developer Edition Solaris OS. Sun / Solaris, Java, Web 2.0,,. Developer Solaris Express Developer Edition System Requirements. 768MB. SPARC
More informationVZ94-한글매뉴얼
KOREAN / KOREAN VZ9-4 #1 #2 #3 IR #4 #5 #6 #7 ( ) #8 #9 #10 #11 IR ( ) #12 #13 IR ( ) #14 ( ) #15 #16 #17 (#6) #18 HDMI #19 RGB #20 HDMI-1 #21 HDMI-2 #22 #23 #24 USB (WLAN ) #25 USB ( ) #26 USB ( ) #27
More information매력적인 맥/iOS 개발 환경 그림 A-1 변경 사항 확인창 Validate Setting... 항목을 고르면 된다. 프로젝트 편집기를 선택했을 때 화면 아 래쪽에 있는 동일한 Validate Settings... 버튼을 클릭해도 된다. 이슈 내비게이터 목록에서 변경할
Xcode4 부록 A Xcode 4.1에서 바뀐 내용 이번 장에서는 맥 OSX 10.7 라이언과 함께 발표된 Xcode 4.1에서 새롭게 추가된 기 능과 변경된 기능을 정리하려고 한다. 우선 가장 먼저 알아둬야 할 사항은 ios 개발을 위한 기본 컴파일러가 LLVM- GCC 4.2로 바뀌었다는 점이다. LLVM-GCC 4.2 컴파일러는 Xcode 4.0의 기본
More informationMicrosoft Word - USB복사기.doc
Version: SD/USB 80130 Content Index 1. Introduction 1.1 제품개요------------------------------------------------------------P.02 1.2 모델별 제품사양-------------------------------------------------------P.04 2. Function
More informationPRO1_02E [읽기 전용]
Siemens AG 1999 All rights reserved File: PRO1_02E1 Information and 2 STEP 7 3 4 5 6 STEP 7 7 / 8 9 10 S7 11 IS7 12 STEP 7 13 STEP 7 14 15 : 16 : S7 17 : S7 18 : CPU 19 1 OB1 FB21 I10 I11 Q40 Siemens AG
More informationThe_IDA_Pro_Book
The IDA Pro Book Hacking Group OVERTIME force (forceteam01@gmail.com) GETTING STARTED WITH IDA IDA New : Go : IDA Previous : IDA File File -> Open Processor type : Loading Segment and Loading Offset x86
More information목차 제 1 장 inexio Touch Driver소개... 3 1.1 소개 및 주요 기능... 3 1.2 제품사양... 4 제 2 장 설치 및 실행... 5 2.1 설치 시 주의사항... 5 2.2 설치 권고 사양... 5 2.3 프로그램 설치... 6 2.4 하드웨
최종 수정일: 2010.01.15 inexio 적외선 터치스크린 사용 설명서 [Notes] 본 매뉴얼의 정보는 예고 없이 변경될 수 있으며 사용된 이미지가 실제와 다를 수 있습니다. 1 목차 제 1 장 inexio Touch Driver소개... 3 1.1 소개 및 주요 기능... 3 1.2 제품사양... 4 제 2 장 설치 및 실행... 5 2.1 설치 시
More informationMicrosoft Word - SRA-Series Manual.doc
사 용 설 명 서 SRA Series Professional Power Amplifier MODEL No : SRA-500, SRA-900, SRA-1300 차 례 차 례 ---------------------------------------------------------------------- 2 안전지침 / 주의사항 -----------------------------------------------------------
More informationDE1-SoC Board
실습 1 개발환경 DE1-SoC Board Design Tools - Installation Download & Install Quartus Prime Lite Edition http://www.altera.com/ Quartus Prime (includes Nios II EDS) Nios II Embedded Design Suite (EDS) is automatically
More information歯회로이론
1 1 2 3 4 5,, ( ) 1-1 (capacitor) (inductor) 1-1 1-4 1-1 (lead) 1-2 1-3 1-4 ( ) 1-5 1-6 ( c o i l ), 1-7 1-8 1-5 1-6,, 1-9 1-7 1-8 1-9 1-10 : (a), (b), (c), (d) 1-10,,, (multimeter) 1 4 2 3 4 5 1-2,,,,,
More informationUNIST_교원 홈페이지 관리자_Manual_V1.0
Manual created by metapresso V 1.0 3Fl, Dongin Bldg, 246-3 Nonhyun-dong, Kangnam-gu, Seoul, Korea, 135-889 Tel: (02)518-7770 / Fax: (02)547-7739 / Mail: contact@metabrain.com / http://www.metabrain.com
More information0.1-6
HP-19037 1 EMP400 2 3 POWER EMP400 4 5 6 7 ALARM CN2 8 9 CN3 CN1 10 24V DC CN4 TB1 11 12 Copyright ORIENTAL MOTOR CO., LTD. 2001 2 1 2 3 4 5 1.1...1-2 1.2... 1-2 2.1... 2-2 2.2... 2-4 3.1... 3-2 3.2...
More informationuntitled
TRIUM SH Trium SH TRIUM SH TRIUM SH TRIUM SH TRIUM SH TRIUM SH TRIUM SH 1. (1) 1 TRIUM SH 2. (1) 1CH 4CH 9CH 16CH PIP (2) 1 TRIUM SH (3) 1 TRIUM SH 1 CLICK TRIUM SH 3. 1 TRIUM SH 4. (1) (2) 1 TRIUM
More informationuntitled
X-Ray FLUORESCENCE NON-DESSTRUCTIVE & NON-CONTAC COATING THICKNESS TESTER EX-3000 Ex WIN Ver.1.00 INSTRUCTION MANUAL ELEC FINE INSTRUMENTS CO., LTD 2-31-5 CHUO, NAKANO-KU, TOKYO, JAPAN PHONE : (03) 3365-4411
More informationOPCTalk for Hitachi Ethernet 1 2. Path. DCOMwindow NT/2000 network server. Winsock update win95. . . 3 Excel CSV. Update Background Thread Client Command Queue Size Client Dynamic Scan Block Block
More information7 LAMPS For use on a flat surface of a type 1 enclosure File No. E Pilot Lamp File No. E Type Classification Diagram - BULB Type Part Mate
7 LAMPS For use on a flat surface of a type 1 enclosure File No. E242380 Pilot Lamp File No. E242380 Type Classification Diagram - BULB Type Part Materials 226 YongSung Electric Co., Ltd. LAMPS
More informationBH의 아이폰 추천 어플
BH의 아이폰 추천 어플 정병훈 소개글 목차 1 [BH의 아이폰 필수 앱] Pulse - 뉴스/웹사이트/RSS 모아주는 앱 4 2 [BH의 아이폰 필수 앱] Dropbox - n스크린 파일 공유 앱 (문서, 사진, 동영상 등) 12 3 [BH의 아이폰 필수 앱] 파노라마 사진찍기 Photosynth 17 4 [BH의 아이폰 필수 앱] 연락처 동기화 네이버 주소록
More information목차 1. 제품 소개... 4 1.1 특징... 4 1.2 개요... 4 1.3 Function table... 5 2. 기능 소개... 6 2.1 Copy... 6 2.2 Compare... 6 2.3 Copy & Compare... 6 2.4 Erase... 6 2
유영테크닉스( 주) 사용자 설명서 HDD014/034 IDE & SATA Hard Drive Duplicator 유 영 테 크 닉 스 ( 주) (032)670-7880 www.yooyoung-tech.com 목차 1. 제품 소개... 4 1.1 특징... 4 1.2 개요... 4 1.3 Function table... 5 2. 기능 소개... 6 2.1 Copy...
More informationPSpice User Manual
Cadence PSD 14.2 / PSpice 9.2.3 Training Guide Schematic Capture Capture CIS Orcad Capture Digital/Analog/Mixed-Signal Simulation NC-Sim PSpice PSpice Advanced Analysis Option Routing SPECCTRA PCB Layout
More informationTEL:02)861-1175, FAX:02)861-1176 , REAL-TIME,, ( ) CUSTOMER. CUSTOMER REAL TIME CUSTOMER D/B RF HANDY TEMINAL RF, RF (AP-3020) : LAN-S (N-1000) : LAN (TCP/IP) RF (PPT-2740) : RF (,RF ) : (CL-201)
More information2
2 3 4 5 6 7 8 9 10 11 60.27(2.37) 490.50(19.31) 256.00 (10.07) 165.00 111.38 (4.38) 9.00 (0.35) 688.00(27.08) 753.00(29.64) 51.94 (2.04) CONSOLE 24CH 32CH 40CH 48CH OVERALL WIDTH mm (inches) 1271.45(50.1)
More information(2) : :, α. α (3)., (3). α α (4) (4). (3). (1) (2) Antoine. (5) (6) 80, α =181.08kPa, =47.38kPa.. Figure 1.
Continuous Distillation Column Design Jungho Cho Department of chemical engineering, Dongyang university 1. ( ).... 2. McCabe-Thiele Method K-value. (1) : :, K-value. (2) : :, α. α (3)., (3). α α (4) (4).
More informationacdc EQ 충전기.hwp
www.sjproporc.com DIGITAL CHARGER & DISCHARGER Intelligent Balancer SJPROPO 서울특별시 강남구 일원동 642-11 대도빌딩 202호 2006 SJPROPO INC. SJ INCORPORATED 사용 설명서 제품 구성물 동작 중 표시 화면 B L C : B A L A N C E R C O N N E C
More information1217 WebTrafMon II
(1/28) (2/28) (10 Mbps ) Video, Audio. (3/28) 10 ~ 15 ( : telnet, ftp ),, (4/28) UDP/TCP (5/28) centralized environment packet header information analysis network traffic data, capture presentation network
More informationWindows 네트워크 사용 설명서
Windows 네트워크 사용 설명서 (Wireless Manager mobile edition 5.5) 그림의 예로 사용된 프로젝터는 PT-FW300NTEA 입니다. 한국어 TQBH0205-5 (K) 목차 소프트웨어 라이센스 계약 3 무선 연결 사용 시 참고 사항 4 보안 관련 참고 사항 6 소프트웨어 요구 사항 12 시스템 요구 사항 12 Wireless
More informationDC Link Application DC Link capacitor can be universally used for the assembly of low inductance DC buffer circuits and DC filtering, smoothing. They
DC Link Capacitor DC Link Application DC Link capacitor can be universally used for the assembly of low inductance DC buffer circuits and DC filtering, smoothing. They are Metallized polypropylene (SH-type)
More information목차 소프트웨어 라이센스 계약 3 무선 연결 사용 시 참고 사항 4 보안 관련 참고 사항 6 Wireless Manager mobile edition 5.5 로 수행 가능한 작업 7 컴퓨터 확인 10 컴퓨터를 연결하기 위해 필요한 환경 10 소프트웨어 설치 / 제거 1
Windows 사용 설명서 Wireless Manager ME 5.5 Wireless Manager mobile edition 5.5 F1111-0 KOREAN WM-LY8JC-K 목차 소프트웨어 라이센스 계약 3 무선 연결 사용 시 참고 사항 4 보안 관련 참고 사항 6 Wireless Manager mobile edition 5.5 로 수행 가능한 작업
More informationUML
Introduction to UML Team. 5 2014/03/14 원스타 200611494 김성원 200810047 허태경 200811466 - Index - 1. UML이란? - 3 2. UML Diagram - 4 3. UML 표기법 - 17 4. GRAPPLE에 따른 UML 작성 과정 - 21 5. UML Tool Star UML - 32 6. 참조문헌
More informationMicrosoft Word - FS_ZigBee_Manual_V1.3.docx
FirmSYS Zigbee etworks Kit User Manual FS-ZK500 Rev. 2008/05 Page 1 of 26 Version 1.3 목 차 1. 제품구성... 3 2. 개요... 4 3. 네트워크 설명... 5 4. 호스트/노드 설명... 6 네트워크 구성... 6 5. 모바일 태그 설명... 8 6. 프로토콜 설명... 9 프로토콜 목록...
More information<35335FBCDBC7D1C1A42DB8E2B8AEBDBAC5CDC0C720C0FCB1E2C0FB20C6AFBCBA20BAD0BCAE2E687770>
Journal of the Korea Academia-Industrial cooperation Society Vol. 15, No. 2 pp. 1051-1058, 2014 http://dx.doi.org/10.5762/kais.2014.15.2.1051 멤리스터의 전기적 특성 분석을 위한 PSPICE 회로 해석 김부강 1, 박호종 2, 박용수 3, 송한정 1*
More informationSRC PLUS 제어기 MANUAL
,,,, DE FIN E I N T R E A L L O C E N D SU B E N D S U B M O TIO
More information(Exposure) Exposure (Exposure Assesment) EMF Unknown to mechanism Health Effect (Effect) Unknown to mechanism Behavior pattern (Micro- Environment) Re
EMF Health Effect 2003 10 20 21-29 2-10 - - ( ) area spot measurement - - 1 (Exposure) Exposure (Exposure Assesment) EMF Unknown to mechanism Health Effect (Effect) Unknown to mechanism Behavior pattern
More information제목을 입력하세요.
1. 4 1.1. SQLGate for Oracle? 4 1.2. 4 1.3. 5 1.4. 7 2. SQLGate for Oracle 9 2.1. 9 2.2. 10 2.3. 10 2.4. 13 3. SQLGate for Oracle 15 3.1. Connection 15 Connect 15 Multi Connect 17 Disconnect 18 3.2. Query
More informationT100MD+
User s Manual 100% ) ( x b a a + 1 RX+ TX+ DTR GND TX+ RX+ DTR GND RX+ TX+ DTR GND DSR RX+ TX+ DTR GND DSR [ DCE TYPE ] [ DCE TYPE ] RS232 Format Baud 1 T100MD+
More informationTHE JOURNAL OF KOREAN INSTITUTE OF ELECTROMAGNETIC ENGINEERING AND SCIENCE Oct.; 27(10),
THE JOURNAL OF KOREAN INSTITUTE OF ELECTROMAGNETIC ENGINEERING AND SCIENCE. 2016 Oct.; 27(10), 926 934. http://dx.doi.org/10.5515/kjkiees.2016.27.10.926 ISSN 1226-3133 (Print) ISSN 2288-226X (Online) Multi-Function
More information8-VSB (Vestigial Sideband Modulation)., (Carrier Phase Offset, CPO) (Timing Frequency Offset),. VSB, 8-PAM(pulse amplitude modulation,, ) DC 1.25V, [2
VSB a), a) An Alternative Carrier Phase Independent Symbol Timing Offset Estimation Methods for VSB Receivers Sung Soo Shin a) and Joon Tae Kim a) VSB. VSB.,,., VSB,. Abstract In this paper, we propose
More information서보교육자료배포용.ppt
1. 2. 3. 4. 1. ; + - & (22kW ) 1. ; 1975 1980 1985 1990 1995 2000 DC AC (Ferrite) (NdFeB; ) /, Hybrid Power Thyrister TR IGBT IPM Analog Digital 16 bit 32 bit DSP RISC Dip SMD(Surface Mount Device) P,
More information28 THE ASIAN JOURNAL OF TEX [2] ko.tex [5]
The Asian Journal of TEX, Volume 3, No. 1, June 2009 Article revision 2009/5/7 KTS THE KOREAN TEX SOCIETY SINCE 2007 2008 ko.tex Installing TEX Live 2008 and ko.tex under Ubuntu Linux Kihwang Lee * kihwang.lee@ktug.or.kr
More information목 차 1. 안전을 위한 주의사항 2. 사 전에 2-1. 제품 특징 2-2. 제품 구성 2-3. 각 부분의 명칭 2 4 5 6 7 3-11. 전 뷰어 / 뷰어 설정 3-12. 전 뷰어 / 환경 설정 3-13. 환경설정 본 값 3-14. 재생방법 (블랙박스) 3-15.
사설명서 http://www.innopix.kr 목 차 1. 안전을 위한 주의사항 2. 사 전에 2-1. 제품 특징 2-2. 제품 구성 2-3. 각 부분의 명칭 2 4 5 6 7 3-11. 전 뷰어 / 뷰어 설정 3-12. 전 뷰어 / 환경 설정 3-13. 환경설정 본 값 3-14. 재생방법 (블랙박스) 3-15. 재생방법 (일반 동영상 플레이어) 3-16.
More informationPreliminary spec(K93,K62_Chip_081118).xls
2.4GHz Antenna K93- Series KMA93A2450X-M01 Antenna mulilayer Preliminary Spec. Features LTCC Based designs Monolithic SMD with small, low-profile and light-weight type Wide bandwidth Size : 9 x 3 x 1.0mm
More informationDDX4038BT DDX4038BTM DDX4038 DDX4038M 2010 Kenwood Corporation All Rights Reserved. LVT A (MN)
DDX4038BT DDX4038BTM DDX4038 DDX4038M 2010 Kenwood Corporation All Rights Reserved. LVT2201-002A (MN) 2 3 [ ] CLASS 1 LASER PRODUCT 4 1 2 Language AV Input R-CAM Interrupt Panel Color Preout
More informationPowerSHAPE 따라하기 Calculate 버튼을 클릭한다. Close 버튼을 눌러 미러 릴리프 페이지를 닫는다. D 화면을 보기 위하여 F 키를 누른다. - 모델이 다음과 같이 보이게 될 것이다. 열매 만들기 Shape Editor를 이용하여 열매를 만들어 보도록
PowerSHAPE 따라하기 가구 장식 만들기 이번 호에서는 ArtCAM V를 이용하여 가구 장식물에 대해서 D 조각 파트를 생성해 보도록 하겠다. 중심 잎 만들기 투 레일 스윕 기능을 이용하여 개의 잎을 만들어보도록 하겠다. 미리 준비된 Wood Decoration.art 파일을 불러온다. Main Leaves 벡터 레이어를 on 시킨다. 릴리프 탭에 있는
More informationApplication TI-89 / Voyage TM 200 PLT application. application, application. APPLICATIONS :, N. 1. O application. 2. application : D C application,. a
Custom TI-89 / Voyage TM 200 PLT custom. custom custom. Custom : CustmOn CustmOff custom. Custom, Toolbar. Custom., Home Toolbar, 2 ¾ custom. 2 ¾ Home Toolbar Custom, custom. Tip: Custom. Custom : custom..
More informationiii. Design Tab 을 Click 하여 WindowBuilder 가자동으로생성한 GUI 프로그래밍환경을확인한다.
Eclipse 개발환경에서 WindowBuilder 를이용한 Java 프로그램개발 이예는 Java 프로그램의기초를이해하고있는사람을대상으로 Embedded Microcomputer 를이용한제어시스템을 PC 에서 Serial 통신으로제어 (Graphical User Interface (GUI) 환경에서 ) 하는프로그램개발예를설명한다. WindowBuilder:
More information요약문 1 요 약 문 1. 과 제 명 : 소음노출 저감을 위한 작업환경관리 및 측정방안 연구 2. 연구기간 : 2007 1. 1 ~ 2007. 12. 31. 3. 연 구 자 : 연구책임자 장 재 길 (연구위원) 공동연구자 정 광 재 (연구원) 4. 연구목적 및 필요성
보건분야-연구자료 연구원 2007-102-1027 소음노출 저감을 위한 작업환경관리 및 측정방안 요약문 1 요 약 문 1. 과 제 명 : 소음노출 저감을 위한 작업환경관리 및 측정방안 연구 2. 연구기간 : 2007 1. 1 ~ 2007. 12. 31. 3. 연 구 자 : 연구책임자 장 재 길 (연구위원) 공동연구자 정 광 재 (연구원) 4. 연구목적 및 필요성
More information개요 AXSR5 레코더에 연결 시 NEXFS700 전용 RAW 포맷으로 변환되어 AXSR5 에서 녹화됩니다(PMWF55, F65 용 RAW 포맷과 다름). 또한 이 제품의 간단한 플레이백 기능을 사용하여 AXSR5에서 레코딩 된 비디오를 볼 수 있습니다. 플레이백 되는
446648911(1) 휴대용 메모리 레코더 인터페이스 유닛 사용 설명서 HXRIFR5 개요 AXSR5 레코더에 연결 시 NEXFS700 전용 RAW 포맷으로 변환되어 AXSR5 에서 녹화됩니다(PMWF55, F65 용 RAW 포맷과 다름). 또한 이 제품의 간단한 플레이백 기능을 사용하여 AXSR5에서 레코딩 된 비디오를 볼 수 있습니다. 플레이백 되는 영상은
More informationAnalytics > Log & Crash Search > Unity ios SDK [Deprecated] Log & Crash Unity ios SDK. TOAST SDK. Log & Crash Unity SDK Log & Crash Search. Log & Cras
Analytics > Log & Crash Search > Unity ios SDK [Deprecated] Log & Crash Unity ios SDK. TOAST SDK. Log & Crash Unity SDK Log & Crash Search. Log & Crash Unity SDK... Log & Crash Search. - Unity3D v4.0 ios
More informationGLHPS-D
Digital Hot Plate & Stirrer GLHPS-D 글로벌랩의 제품을 구입하여 주셔서 감사드립니다. 제품을 사용하시기 전에 안전을 위한 준비사항 을 읽고 올바르게 사용해 주십시오. 이 사용설명서는 제품을 직접 사용하시는 분에게 보내어지도록 하여 주십시오. 사용 전 주의 사항 제품을 올바르게 사용하여 위험이나 재산상의 피해를 막기 위한 내용으로 반드시
More information휠세미나3 ver0.4
andromeda@sparcs:/$ ls -al dev/sda* brw-rw---- 1 root disk 8, 0 2014-06-09 18:43 dev/sda brw-rw---- 1 root disk 8, 1 2014-06-09 18:43 dev/sda1 brw-rw---- 1 root disk 8, 2 2014-06-09 18:43 dev/sda2 andromeda@sparcs:/$
More information