1 PLC 1 11 PLC 1 111 PLC 1 112 PLC 1 12 PLC 2 121 2 122 6 13 CPU 9 131 9 14 PLC 10 141 PLC 10 142 PLC 11 2 MASTER-K 14 21 14 211 PLC 14 212 PLC 15 213 MASTER-K 16 22 17 23 18 231? 18 232 19 233 20 3 MASTER-K 29 31 29 32 33 1
4 46 41 () 46 411 LOA, LOA NOT, OUT 46 412 AN, AN NOT 48 413 OR, OR NOT 49 42 50 421 EN 50 43 51 431 NOP 51 432 KGL-WIN 53 44 64 441 AN LOA 64 442 OR LOA 66 443 MPUSH, MLOA, MPOP 67 444 KGL-WIN 71 45 74 451 NOT 74 46 75 461 MCS,MCSCLR 75 47 78 471 78 471 NOT 83 48 84 481 SET 84 482 RST 85 49, 89 491 SET S 89 492 OUT S 92 410 97 4101 ON delay(ton) 97 4102 OFF delay(toff) 100 4103 (TMR) 105 4104 (TMON) 107 4105 (TRTG) 109 411 114 4111 UP COUNTER(CTU) 114 4112 OWN COUNTER(CT) 117 4113 UP OWN COUNTER(CTU) 118 2
4113 RING COUNTER(CTR) 120 5 130 51? 130 52 PLC 131 1: 1 2: 2 3: 4 4 : Handy Loader Code 10 3
1 PLC 11 PLC 111 PLC PLC(Programmable Logic Controller),,, LSI,, (NEMA: National Electrical Manufactrurers Association),,,, 112 PLC PLC FMS(Flexible Manufacturing System) PLC, 1-1 PLC 1-1 PLC,,,,,,,,,,,,,,, PLC LG
12 PLC 121 (1) PLC (microprocessor) (CPU),,, PLC 1-1 PLC (2) PLC CPU PLC 2 (3) PLC CPU ➀ IC ROM(Read Only Memory) RAM(Random Access Memory) ROM,, RAM, RAM (Battery back-up) ➁ PLC,, 3 PLC LG
, RAM, ROM ROM,,, RAM PLC PLC, PLC ROM (4) PLC PLC PLC C+5 V (TTL ) PLC (Interface) PLC ➀ ➁ CPU [(Photocoupler) ] ➂ ➃ (LE ) Panel 1-2 1-2 I/O () () PLC LG
) CPU C24[V], AC110[V], (A/), ( High Speed Counter) 1-2 PLC LG
),, SSR(Solid State Relay), (/A), 1-3 1-3 () (C) (AC) SSR 1-3 1-3, SSR PLC LG
122 (1) (Hardwired Logic) (),,, (Hardware), (Softwired Logic), PLC (2) PLC PLC LSI,, PLC () PLC 1-5 PLC PLC PLC LG
1-6(a) PLC A B, E, C F ON, PLC C ON F ON PLC 1-6(b) J H ON I PLC G I ON J H ON H ON b H I OFF () 1 PLC (ON/OFF), () PLC, PLC PLC, PLC, PLC LG
PLC 1-7 1-7 PLC PLC LG
13 CPU 131 Refresh 0000 Step EN 1 Scan Refresh 0 EN, Refresh Refresh Refresh (1) Refresh : Unit ata Read ata Memory(P) (2) Refresh : ata Memory (P) ata Unit (3) (IORF) : Refresh (4) OUT : Sequence Program ata Memory (P) EN Refresh ON OFF REMARK 1 Scan : Unit ata Read ata Memory (P) 0 Step EN, Timer, Counter ata Memory (P) ata Unit PLC LG
14 PLC PLC PLC 141 PLC (Mnemonic), (Ladder), SFC(Sequential Function Chart) MASTER-K PLC (Mnemonic), (Ladder) 2, (Conversion) (1) (Mnemonic) (Handy Loader) LOA P000 AN NOT P001 OR P002 OUT P020 ( ) (2) (Ladder):, + _ ( ) PLC LG
142 PLC (1) PLC () PLC (Open) A NO ( Normally Open ) PLC:, ON/OFF (Closed) B NC ( Normally Closed ) PLC:, ON/OFF C a, b PLC PLC 2) (Point) : 8, 6 PLC 8, 6 PLC (Step) : PLC A, B, 1 CPU (: 30k step, :sec/step ) (Scan Time) : 1 WT(Watch og Timer) : CPU (WT) 200ms (Parameter) : PLC, PLC LG
3) PLC PLC PLC (1) PLC CPU Loader ( KGL-WIN, Handy Loader ) COM C24V COM (LAMP) (C C ) PLC PLC S/W1 S/W2 C24V P00 P01 P00 P01 CPU P10 P13 P10 P13 OFF LAMP1 ON LAMP2 S/W1 OFF a P00 S/W1 OFF, (isconnect) P10 OFF S/W2 OFF b P01 S/W2 OFF, (Connect) P13 ON COM COM PLC : () S/W1 S/W2 P00 P01 P00 P01 CPU P10 P13 P10 P13 ON LAMP1 OFF LAMP2 S/W1 ON a P00 S/W1 ON, (Connect) P10 ON S/W2 ON b P01 S/W2 ON, (isconnect) P13 OFF C24V COM COM PLC PLC LG
(P00)(P10) P00 P01 P00 P01 P10 P10 OFF LAMP P00 OFF P00 P01 OFF P01 P10 OFF P10 OFF P10 C24V AC220V P00 P01 P00 P01 P10 P10 P10 ON LAMP P00 ON P00 P01 OFF P01 P10 ON P10 ON P10, a C24V AC220V P00 P01 P00 P01 P10 P10 P10 ON LAMP P00 OFF P00 P10 P01 OFF P01 P10 ON P10 ON C24V AC220V P00 P00 P01 P01 P00 P01 P10 P10 P10 P10 OFF LAMP P00 OFF P00 P01 ON P01 P10 OFF P10 OFF AC220V C24V PLC LG
2 MASTER-K 21 211 PLC PLC (BASE), (SMPS), CPU, (I,O,,) TYPE K10S1, K10S, K30S, K60S, K80S TYPE, CPU, CPU, (Slot), CPU REMARK : : CPU :,, : (,), (,,), 2 MASTER-K 14 LG
8212 PLC K1000S 1024 8 32 (K300S, 1 ) 256 ( 8 X 32) 1024 1/4 1024 32,, 32 8 CPU, CPU, Connector 1 CPU, Connector 2 CPU 8 8 1 2 8 3 2 MASTER-K 15 LG
213 MASTER-K KLC-010A K10S, K10S1 KLA-009 KLC-50A MASTER-K KLC-15A KLC-010A PC, KGL_WIN Setup KL-150S EPROM WRITER KEW-150S EPROM KLC-50A PCPLC KLC-15A PLC KLC-10A PLC(K10S,K10S1) KLA-009 PC KL-150S KEW-150S 2 MASTER-K 16 LG
22 PLC, PLC PLC, PLC???? P0001 P0020 P0021 ( PLC ) ( PLC ) PLC (P) (evice ) P P Word Word : 10 : 16 (0~F) : PLC 16 32 2 P000 P001 POWER CPU 32 P002 P003 32 P004 16 P005 P006 P007 P008 P009 P010 P011 32 P012 P013 32 1 2 3 4 5 6 7 8 (HSC), 16,32,64 P11F: P11 F(16 ) 2 MASTER-K 17 LG
23 231? PLC, P ON/OFF, ata, PLC, (Bit) 1) (1) M : PLC a, b, M (2) K ( ) : PLC ata ata (3) F : PLC, PLC (4) ata Register : 16Bit(1Word)) 32Bit(2Word) (5) T : (6) C : (7) : L, Register : # 2 MASTER-K 18 LG
232 Bit( ) Word evice M 00 01 02 03 04 K P L F C T Bit() F E C B A 9 8 7 6 5 4 3 2 1 0 F E C B A 9 8 7 6 5 4 3 2 1 0 F E C B A 9 8 7 6 5 4 3 2 1 0 M 02B M 02 B evice Word M 035 M 03 5 evice Word Bit CPU Word Word ata, 1 16Bit 65535(16 :FFFF), T, C evice ata () [MOV h1234 M01] : M01 16 1234 F E C B A 9 8 7 6 5 4 3 2 1 0 M01 0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0 HEX 1 2 3 4 BL,BAN,BOR Bit (K80S, K200S, 300S, 1000S) 2 MASTER-K 19 LG
233 MASTER-K S (K10S1) P00 P01 M00 M15 K00 Bit ata Word ata 0 ~ F 0 ~ FFFF 000 P000~P015 ata Register IN :8; 0 ~ 7 (64 Word) OUT 6 ; 10 ~ 15 256 128 P M 063 User 800 Step K07 F00 F15 L00 L07 256 128 K L T000 T031 T032 T047 C000 C015 (01 ) 96 Word (001 ) 32 Word Timer 48 Word Counter 16 Word T000 S00 00 ~ 99 0 ~ 65535 T031 T032 T047 C000 (01 ) 96 (001 ) 32 Counter T T S15 Step Controller (16 x 100 ) S0000~S1599 S 1 1 C015 128 C ( ) K L T C S K000~K07F L000~L07F 01 :T024~T031 001 :T044~T047 C012~C015 048~063 S12~S15 2 MASTER-K 20 LG
MASTER-K S (K10S, K30S, K60S, K100S) P00 P05 M00 M31 K00 Bit ata Word ata 0 ~ F 0 ~ FFFF 000 P000~P05F(96 ) 512 256 P M 255 ata Register (256 Word) User 2K Step K15 F00 F15 L00 L15 256 256 K L T000 T095 T096 T127 C000 C127 (01 ) 96 Word (001 ) 32 Word Timer 128 Word Counter 128 Word T000 T031 T032 (01 ) 96 (001 ) 32 T S00 S31 00 ~ 99 0 ~ 65535 Step Controller (31 x 100 ) S0000~S3199 S 1 1 T047 C000 Counter T C015 128 C ( ) K L T C S K000~K15F L000~L15F 01 :T072~T095 001 :T120~T127 C096~C127 192~255 S24~S31 2 MASTER-K 21 LG
MASTER-K 200H P00 P11 M00 M63 K00 Bit ata Word ata 0 ~ F 0 ~ FFFF 0000 192 1024 512 P M 1023 ata Register (1024 Word) User 4K Step K31 F00 F15 L00 L31 256 512 K F L T000 T191 T192 T255 C000 C255 (01 ) 192 Word (001 ) 64 Word Timer 256 Word Counter 256 Word T000 T192 T191 (01 ) 96 (001 ) 32 T S00 S63 00 ~ 99 0 ~ 65535 Step Controller (64 x 100 Step) S0000~S6399 S 1 1 T255 C000 Counter T C255 128 C ( ) K L T C S K000~K31F 01 :T144~T191 001 :T240~T255 C192~C255 0768~1023 S48~S63 2 MASTER-K 22 LG
MASTER-K 500H P00 P31 M000 M189 K00 Bit ata Word ata 0 ~ F 0 ~ FFFF 0000 ata Register (10000 Word) 512 * 9000 3072 512 P M 9999 User 15K Step K31 F00 F31 L00 L63 512 1024 K F L T000 T191 T192 T255 C000 C255 (01 ) 192Word (001 ) 64 Word Timer 256 Word Counter 256 Word T000 T192 T191 (01 ) 192 (001 ) 64 T S00 S99 00 ~ 99 Step Controller (100 x 100 Step) S0000~S9999 S T255 C000 Counter T C255 256 C K M,L T C S K000~K31F 01 :T144~T191 001 :T240~T255 C192~C255 6000~8999 S80~S99 2 MASTER-K 23 LG
MASTER-K 1000H P00 P63 M000 M189 K00 Bit ata Word ata 0 ~ F 0 ~ FFFF 0000 ata Register (1024 Word) 1024 * 9000 3072 512 P M 9999 User 15Kstep K31 F00 F31 L00 L63 512 1024 K F L T000 T191 T192 T255 C000 C255 (01 ) 192 Word (001 ) 64 Word Timer 256 Word Counter 256 Word T000 T192 T191 (01 ) 192 (001 ) 64 T S00 S99 00 ~ 99 Step Controller (100 x 100 Step) S0000~S9999 S T255 C000 Counter T C255 256 C K M,L T C S K000~K31F 01 :T144~T191 001 :T240~T255 C192~C255 6000~8999 S80~S99 2 MASTER-K 24 LG
MASTER-K 80S P00 P13 M000 M191 K00 Bit ata Word ata 0 ~ F 0 ~ FFFF 0000 ata Register (5000 Word) 224 3072 1024 P M 4999 User 7K Step K31 F00 F63 L00 L63 1024 1024 K F L T000 T191 T192 T255 C000 C255 (01 ) 192 Word (001 ) 64 Word Timer 256 Word Counter 256 Word T000 T191 T192 (01 ) 192 (001 ) 64 T S00 S99 00 ~ 99 Step Controller (100 x 100 Step) S0000~S9999 S T255 C000 Counter T C255 256 C K M,L T C S K000~K31F 01 :T144~T191 001 :T240~T255 C192~C255 3500~4500 S80~S99 2 MASTER-K 25 LG
MASTER-K 200S P00 P15 M000 M191 K00 Bit ata Word ata 0 ~ F 0 ~ FFFF 0000 ata Register (5000 Word) 256 3072 1024 P M 4999 User 7K Step K31 F00 F63 L00 L63 1024 1024 K F L T000 T191 T192 T255 C000 C255 (01 ) 192 Word (001 ) 64 Word Timer 256 Word Counter 256 Word T000 T191 T192 (01 ) 192 (001 ) 64 T S00 S99 00 ~ 99 Step Controller (100 x 100 Step) S0000~S9999 S T255 C000 Counter T C255 256 C K M,L T C S K000~K31F 01 :T144~T191 001 :T240~T255 C192~C255 3500~4500 S80~S99 2 MASTER-K 26 LG
MASTER-K 300S P00 P31 M000 M189 K00 Bit ata Word ata 0 ~ F 0 ~ FFFF 0000 512 3072 512 P M 4999 ata Register (5000 Word) User 15K Step K31 F00 F31 L00 L63 512 1024 K F L T000 T191 T192 T255 C000 C255 (01 ) 192 Word (001 ) 64 Word Timer 256 Word Counter 256 Word T000 T192 T191 (01 ) 192 (001 ) 64 T S00 S99 00 ~ 99 Step Controller (100 x 100 Step) S0000~S9999 S T255 C000 Counter T C255 256 C K M,L T C S K000~K31F 01 :T144~T191 001 :T240~T255 C192~C255 3500~4500 S80~S99 2 MASTER-K 27 LG
MASTER-K 1000S P00 P63 M000 M191 K00 Bit ata Word ata 0 ~ F 0 ~ FFFF 0000 512 3072 512 P M 9999 ata Register (10000 Word) User 30Kstep K31 F00 F31 L00 L63 512 1024 K F L T000 T191 T192 T255 C000 C255 (01 ) 192 Word (001 ) 64 Word Timer 256 Word Counter 256 Word T000 T192 T191 (01 ) 192 (001 ) 64 T S00 S99 00 ~ 99 Step Controller (100 x 100 Step) S0000~S9999 S T255 C000 Counter T C255 256 C K M,L T C S K000~K31F 01 :T144~T191 001 :T240~T255 C192~C255 6000~8999 S80~S99 2 MASTER-K 28 LG
3 MASTER-K 31 Function No LOA - a LOA NOT - b AN - a AN NOT - b OR - a OR NOT - b Function No AN LOA - A B A, B OR LOA - A B A, B MPUSH 005 ( ) MPUSH Push MLOA 006 MLOA ( ) Load MPOP 007 MPOP ( ) Pop Function No NOT - NOT 3 MASTER-K 29 LG
Function No MCS 010 MCS n Set (n : 0 ~ 7) MCSCLR 011 MCSCLR n Clear (n : 0 ~ 7) Function No 017 1 Pulse NOT 018 NOT 1 Pulse SET - SET On (Set) RST - RST Off (Reset) OUT - ( ) / Function NO SET S - SET Sxxxx () OUT S - ( Sxxxx ) () Function No EN 001 EN Program 3 MASTER-K 30 LG
Function No NOP 000 (No Operation), Function No TON - TON t On elay () t= TOFF - TOFF t Off elay () t= TMR - TMR t1 t 2 () t= (t1+t2) TMON - TMON Monostable t () t= TRTG - TRTG () t Retriggerable t= 3 MASTER-K 31 LG
Function No Count Pulse Reset CT - Reset CT R <S> () Count Pulse Count Pulse Reset CTU - Reset U CTU R <S> () Count Pulse Pulse Reset CTU - U CTU Pulse Reset R <S> Pulse Pulse () Count Pulse Reset CTR - Reset U CTR R <S> () Count Pulse 3 MASTER-K 32 LG
32 Function No MOV 080 MOV S MOVP 081 MOVP S Move MOV 082 MOV S S MOVP 083 MOVP S CMOV 084 CMOV S Complement Move CMOVP 085 BCMOVP S S 1 0 1 0 1 0 1 CMOV CMOVP 086 087 CMOV S CMOVP S 0 1 0 1 0 1 0 GMOV 090 GMOV S Z Group Move GMOVP 091 GMOVP S Z S Z FMOV 092 FMOV S Z File Move FMOVP 093 FMOVP S Z S Z BMOV 100 BMOV S CW Move BMOVP 101 BMOVP S CW S 3 MASTER-K 33 LG
Function No BC 060 BC S BCP 061 BCP S BIN BC BC 062 BC S S BCP 063 BCP S BC BIN 064 BIN S BINP BIN 065 066 BINP BIN S S BC S BIN BIN BINP 067 BINP S Function No CMP 050 CMP S1 S2 CMPP 051 CMPP S1 S2 S1 S2 CMP 052 CMP S1 S2 () CMPP 053 CMPP S1 S2 TCMP 054 TCMP S1 S2 TCMPP 055 TCMPP S1 S2 Table Compare TCMP 056 TCMP S1 S2 TCMPP 057 TCMPP S1 S2 LOA= LOA= LOA> LOA> LOA< LOA< LOA>= LOA>= LOA<= LOA<= LOA<> LOA<> 028 029 038 039 048 049 058 059 068 069 078 079 = S1 S2 > S1 S2 < S1 S2 >= S1 S2 <= S1 S2 < > S1 S2 S1 S2 Result Bit (BR) ( Signed ) MASTER-K 80S 3 MASTER-K 34 LG
AN= AN= AN> AN> AN< AN< AN>= AN>= AN<= AN<= AN<> AN<> OR= OR= OR> OR> OR< OR< OR>= OR>= OR<= OR<= OR<> OR< > Function No 094 095 096 097 098 099 106 107 108 109 118 119 188 189 196 197 198 199 216 217 218 219 228 229 = S1 S2 > S1 S2 < S1 S2 >= S1 S2 <= S1 S2 < > S1 S2 = S1 S2 > S1 S2 < S1 S2 >= S1 S2 <= S1 S2 < > S1 S2 S1 S2 BR AN Result Bit(BR) (Signed ) S1 S2 BR OR Result Bit(BR) (Signed ) Function No INC 020 INC INCP 021 INCP Increment + 1 INC 022 INC INCP 023 INCP EC 024 EC ECP 025 ECP ecrement 1 EC 026 EC ECP 027 ECP 3 MASTER-K 35 LG
Function No ROL 030 ROL ROLP 031 ROLP CY ROL 032 ROL ROLP 033 ROLP ROR 034 ROR RORP 035 RORP CY ROR 036 ROR RORP 037 RORP RCL 040 RCL Carry Flag RCLP 041 RCLP CY RCL 042 RCL RCLP 043 RCLP RCR 044 RCR Carry Flag RCRP 045 RCRP CY RCR 046 RCR RCRP 047 RCRP Function No BSFT BSFTP 074 075 BSFT S E BSFTP S E Shift WSFT WSFTP 070 071 WSFT S E WSFTP S E Shift SR 237 SR N Shift 3 MASTER-K 36 LG
Function No XCHG XCHGP 102 103 XCHG 1 2 XCHGP 1 2 XCHG XCHGP 104 105 XCHG 1 2 XCHGP 1 2 1 2 BIN Function No A 110 A s1 S2 AP 111 AP S1 S2 Binary Add A 112 A S1 S2 S1 + S2 AP 113 AP S1 S2 SUB 114 SUB S1 S2 SUBP 115 SUBP S1 S2 Binary Subtract SUB 116 SUB S1 S2 S1 - S2 SUBP 117 SUBP S1 S2 MUL MULP 120 121 MUL S1 S2 MULP S1 S2 Binary Multiply MUL MULP 122 123 MUL S1 S2 MULP S1 S2 S1 S2 () +1() IV 124 IV S1 S2 IVP 125 IVP S1 S2 Binary ivide IV 126 IV S1 S2 S1 S2 () IVP 127 IVP S1 S2 +1() 3 MASTER-K 37 LG
Function No MULS 072 MULS S1 S2 S1 S2 () MULSP MULS 073 076 MULSP S1 S2 MULS S1 S2 ( signed ) + 1 () MULSP 077 MULSP S1 S2 IVS 088 IVS S1 S2 S1 S2 () IVSP IVS 089 128 IVSP S1 S2 IVS S1 S2 ( signed ) + 1 () IVSP 129 IVSP S1 S2 3 MASTER-K 38 LG
BC Function No AB 130 AB S1 S2 ABP 131 ABP S1 S2 BC Add AB 132 AB S1 S2 S1 + S2 ABP 133 ABP S1 S2 SUBB 134 SUBB S1 S2 SUBBP 135 SUBBP S1 S2 BC Subtract SUBB 136 SUBB S1 S2 S1 - S2 SUBBP 137 SUBBP S1 S2 MULB MULBP MULB 140 141 142 MULB S1 S2 MULBP S1 S2 MULB S1 S2 BC Multiply S1 S2 () +1() MULBP 143 MULBP S1 S2 IVB 144 IVB S1 S2 IVBP 145 IVBP S1 S2 BC ivide IVB 146 IVB S1 S2 S1 S2 () IVBP 147 IVBP S1 S2 +1() Function No WAN 150 WAN S1 S2 WANP 151 WANP S1 S2 Word AN WAN 152 WAN S1 S2 S1 AN S2 WANP 153 WANP S1 S2 3 MASTER-K 39 LG
Function No WOR 154 WOR S1 S2 WORP 155 WORP S1 S2 Word OR WOR 156 WOR S1 S2 S1 OR S2 WORP 157 WORP S1 S2 WXOR 160 WXOR S1 S2 WXORP 161 WXORP S1 S2 Word Exclusive OR WXOR 162 WXOR S1 S2 S1 XOR S2 WXORP 163 WXORP S1 S2 WXNR WXNRP 164 165 WXNR S1 S2 WXNRP S1 S2 Word Exclusive NOR WXNR 166 WXNR S1 S2 S1 XNR S2 WXNRP 167 WXNRP S1 S2 Function No SEG 174 SEG S CW SEGP 175 SEGP S CW 7 Segment ASC 190 ASC S CW ASCII ASCP 191 ASCP S CW 3 MASTER-K 40 LG
Function No FALS 204 FALS n () UTY 205 UTY n1 n2 n1 On, n2 Off WT WTP 202 203 WT WT P Watch og Timer Clear OUTOFF 208 OUTOFF Off STOP 008 STOP PLC BSUM Function No 170 BSUM S BSUMP 171 BSUMP S Bit Summary BSUM 172 BSUM S Word ata 1 Count BSUMP 173 BSUMP S ENCO ENCOP 176 177 ENCO S Z ENCOP S Z Encode ECO ECOP 178 179 ECO S Z ECOP S Z ecode FILR 180 FILR S Z FILRP 181 FILRP S Z File Table Read FILR 182 FILR S Z FILRP 183 FILRP S Z FILW 184 FILW S Z FILWP 185 FILWP S Z File Table Write FILW 186 FILW S Z FILWP 187 FILWP S Z 3 MASTER-K 41 LG
Function No IS 194 IS S Z istribution () ISP 195 ISP S Z Nibble (4 ) UNI 192 UNI S Z Union () UNIP 193 UNIP S Z Nibble (4 ) IORF IORFP 200 201 IORF S1 S2 IORFP S1 S2 I/O Refresh Function No JMP 012 JMP n Jump JME 013 JME n Jump End CALL 014 CALL n Subroutine Call CALLP 015 CALLP n SBRT 016 SBRT n Subroutine RET 004 RET Return Loop Function No FOR NEXT 206 207 FOR NEXT n BREAK 220 BREAK For ~ Next Loop 3 MASTER-K 42 LG
Function No STC 002 STC Set CLC 003 CLC Reset Function No CLE 009 CLE F115 Function No GET GETP 230 231 GET GETP n N n n N n RAM Read (CPU RAM) PUT PUTP 234 235 PUT PUTP n N S n n N S n RAM Write (CPU RAM) 3 MASTER-K 43 LG
Function No REA 244 WRITE 245 RGET 232 RPUT 233 REA t s S n X WRITE t s S n X RGET t s S n X RPUT t s S n X FUEA Read FUEA Write FUEA Remote Read FUEA Remote Write CONN (MINI MAP) 246 CONN t s X [MiniMap ] STATUS 247 STATUS t s X Function No EI 238 EI n () I 239 I n () EI 221 EI () I 222 I () TINT n 226 TINT n INT n 227 I N T n IRET 225 I R E T (Routine) Function No NEG 240 NEG NEGP 241 NEGP 2 NEG 242 NEG NEGP 243 NEGP 3 MASTER-K 44 LG
() Function No BL 248 B N evice N BLN 249 BN N evice N BAN 250 B N evice N AN BANN 251 BN N evice N AN BOR 252 B N evice N OR BORN 253 BN N evice N OR BOUT 236 BOUT N evice N BSET 223 BSET N evice N Set BRST 224 BRST N evice N Reset 3 MASTER-K 45 LG
4 41 ( ) 411 LOA, LOA NOT, OUT M P K L F T C S LOA LOA NOT S1 O O O O O O O O OUT O O O O* O # 1 ( ) LOA S1 OUT ( ) LOA NOT S1 LOA S1 1) a (S1) On/Off LOA NOT S1 1) b (S1) On/Off OUT 1) OUT OUT 4 46 LG
P000 On On P023 Off ( P0020 ) LOA S1 ( P0021 ) ( P0023 ) LOA NOT OUT P0020 P0021 P0023 4 47 LG
412 AN, AN NOT M P K L F T C S # AN AN NOT S1 O O O O O O O O 1 ( ) S AN S1 ( ) S AN NOT S1 AN S1 1) a (S1) a, S S1 AN AN NOT S1 1) b (S1) b, S S1 AN P0021 AN P0002 AN NOT P0021 P0001 AN P0002 AN NOT ( P0021 ) 4 48 LG
413 OR, OR NOT M P K L F T C S # OR OR NOT S1 O O O O O O O O 1 S ( ) OR S1 OR NOT S1 OR S1 1) a (S1) a, S S1 OR OR NOT S1 1) b (S1) b, S S1 OR, P0001 On P0021 P0001 ( P0021 ) OR S1 4 49 LG
42 421 EN M P K L F T C S # EN 1 ( ) ( ) [ EN ] EN 1) EN 0000 EN ( Error ) Refresh 0000 LOA P0020 0001 AN P0021 1 2550 EN Refresh 4 50 LG
43 431 NOP M P K L F T C S # NOP 1 NOP( ) 1) (No Operation) NOP ) ) REMARK NOP (Scan time) NOP NOP [] 0000 LOA P0020 0001 AN P0021 0002 NOP 0003 OUT P0060 0004 LOA P0022 0005 OUT P0061 0006 EN [] P0020 P0021 0 ( P0060 ) P0022 NOP 4 ( P0061 ) 6 [ EN ] 4 51 LG
: [LOA, AN, OR, OUT] 1 2 1 2 ( ) P000 P002 <> SENSOR <> SENSOR <> SENSOR 0 1 2 3 0 1 2 M C24 1 C C M 2 PLC (MASTER-K,2A/,5A/1COM) MAGNETIC S/W MAGNETIC S/W MAGNETIC S/W (PUMP) 3 PLC 4 52 LG
4 3 2 KGLWIN 1) (1) KGL-WIN, (2) -- PLC-PC (3) KGL-WIN - ( ) 4 53 LG
(3) PLC,,, 4 54 LG
2) (1),, (2) a[f3] (2) [ENTER] P02 4 55 LG
(4) b[f4] P002 (5) [F6] (6) (4) P1 4 56 LG
(7) [F9] P30 P31 (8) [F10] EN 4 57 LG
3) (PC PLC) 1) (1) + ++ ( ) (2) () (3) ERROR PLC KGL-WIN,, PLC PLC-PC CABLE 2 2 3 3 5 5 PLC(9,6P) PC(9P) 6 5 4 3 2 1 2 3 5 2 3 7 ( MASTER-K 10S,10S1 PIN NUMBER ) PLC(9P) PC(25P) 4 58 LG
(4) OK 7STEP 7 OK (5) (6) PLC PC ( TEST TEST ) (9) PLC LAER REMARK? PLC S/W ( KGLWIN ) PLC ERROR LAER, ATA MEMORY 4 59 LG
: 1 ELETE elete KEY 2 / : [Ctrl+U] : [Ctrl+M] 3 INSERT KEY 4, 4 60 LG
: [LOA, AN, OR, OUT] 1 PB1, PB2, PB0 2 P00 P02 <> <> <> 0 1 2 3 0 1 2 M Mag S/W Mag S/W 4 61 LG
3 0 P0001 P0020 P0002 ( P0020 ), P0002 6 P0002 P0021 P0001 ( P0021 ), 11 [ EN ] P0001 < > P0001 0 P0020 1 ( P0020 ) On P0020 On, a P0020 On P0001 On 4 62 LG
: 1 A,B PB0, PB1 RESET (PB2) 2 P000 P002 < A> 0 0 < B> < RESET> 1 2 3 1 2 L A L B 3 P0020 P0001 P0021 P0002 P0021 P0002 P0020 ( P0020 ) ( P0021 ) [ EN ] P00 ON P20 ON P20 b P01 ON P21 ON P01 ON P21 ON b P21 P00 ON P20 ON REMARK 2, 3 2 b, 3 4 63 LG
44 441 AN LOA (Mnemonic ) M P K L F T C S # AN LOA 1 AN LOA ( ) A B 1) A B AN AN LOA, P0004 P0002, P0005 On P0020 P0001 P0004 P0005 P0003 ( P0020 ) P0002 AN LOA P0004 P0002 P0005 P0003 P0020 4 64 LG
2 M0000 M0002 M0004 M0006 M0008 ( P0020 ) M0001 M0003 M0005 M0007 M0009 [ EN ] AN LOA AN LOA LOA OR LOA OR AN LOA LOA OR AN LOA LOA OR AN LOA LOA OR AN LOA OUT EN M0000 M0001 M0002 M0003 M0004 M0005 M0006 M0007 M0008 M0009 P0020 LOA OR LOA OR LOA OR LOA OR LOA OR AN LOA AN LOA AN LOA AN LOA OUT EN M0000 M0001 M0002 M0003 M0004 M0005 M0002 M0007 M0008 M0009 P0020 7(8 ) 4 65 LG
442 OR LOA(Mnemonic ) M P K L F T C S # OR LOA 1 A ( ) B OR LOA 1) A B OR OR LOA, P0005 P0004, P0005 On P0020, P0021 P0002 P0005 ( P0020 ) P0001 P0003 P0004 OR LOA P0002 ( P0021 ) P0004 P0005 P0020 P0021 4 66 LG
2 M0000 M0002 M0001 M0003 ( P0020 ) M0004 M0005 M0006 M0007 M0008 M0009 [ EN ] LOA AN LOA AN OR LOA LOA AN OR LOA LOA AN OR LOA LOA AN OR LOA OUT EN OR LOA M0000 M0001 M0002 M0003 M0004 M0005 M0006 M0007 M0008 M0009 P0020 OR LOA LOA AN LOA AN LOA AN LOA AN LOA AN OR LOA OR LOA OR LOA OR LOA OUT EN OR LOA M0000 M0001 M0002 M0003 M0004 M0005 M0006 M0007 M0008 M0009 P0020 7(8 ) 4 67 LG
443 MPUSH, MLOA, MPOP(Mnemonic ) MPUSH MLOA MPOP M P K L F T C S # 1 MPUSH MLOA MPOP MPUSH, MLOA, MPOP 1) Ladder M0000 1 2 3 4 M0001 M0002 M0003 M0004 ( P0020 ) ( P0021 ) ( P0022 ) ( P0023 ) 1 MPUSH : M0000 PLC 2 MLOA : M0000 3 MLOA : M0000 4 MPOP : M0000 PLC Read Reset REMARK MPUSH ~ MPOP 8 MPUSH : MLOA : MPOP : 4 LG 68
0 27 P0001 P0002 P0003 P0004 P0005 P0002 P0007 P0008 P0009 P000A ( P0020) ( P0021) ( P0022) ( P0023) ( P0024) ( P0025) ( P0026) [ EN ] STEP INSTRUCTION 0000 0001 0002 0000 0004 0005 0002 0007 0008 0009 0010 0011 0012 0013 0014 0015 0016 0017 0018 0019 0020 0021 0022 0023 0024 0025 0026 0027 0028 0029 0000 LOA MPUSH AN MPUSH AN AN MPUSH AN OUT MLOA AN OUT MPOP AN OUT MLOA AN OUT MPOP AN OUT MLOA AN OUT MPOP AN OUT EN NOP NOP NOP P0001 P0002 P0003 P0004 P0020 P0005 P0021 P0002 P0022 P0007 P0023 P0008 P0024 P0009 P0025 P000A P0026 4 69 LG
: ( ) 1 SW1 ON SW2 OFF SW2 ON SW1 OFF L 2 SW1 SW2 P000 P002 SW1() SW2(P0001) 0 1 2 3 0 1 2 LAMP(P0020) L 3 ( ) 1 2 0 1 2 ( ) 1: 2:P0001 :P0020 5 [ EN ] REMARK (VARIABLE)?, (:P20,P21,M000 ),,, 4 70 LG
4 4 4 KGL-WIN 1) (1) (2) a 1 (3) 1 (4) b 1 2 (5) 1 P0001 P0001 (COMMENT) 4 71 LG
(6) (F9) 1 2 ( ) (7) P0020 P0020 (8) PLC () 1 2 1 2 ( ) (9) 4 72 LG
2) PLC 1 (1) -- 1 (2) / () 2 (3) / (,ENTER) 3 (4) PLC 4 (5) (3) (6) 2 3,, 4 0 5 4 73 LG
45 451 NOT M P K L F T C S # NOT 1 ( ) NOT 1) [NOT] a b, b a(, ) 1, 2 1 P0001 P0002 P0003 P0004 ( P0020 ) 2 P0001 ( P0020 ) P0002 P0003 P0004 4 74 LG
46 461 MCS, MCSCLR M P K L F T C S # MCS MCSCLR O 1 MCS n n(nesting) 0 ~ 7 MCSCLR n MCS, MCSCLR 1) MCS On MCS MCSCLR Off MCS 0 7 MCSCLR MCS () MCS MCSCLR (NESTING) : 1 2 1 2 3 3 1 2 3 [ MCS 0 ] 1 [ MCS 1 ] 2 [ MCS 2 ] 2 1 3 3 [ MCSCLR 2 ] < > 1( 1): 1 ON 2( 2): 1, 2 ON 3( 3): 1, 2, 3 ON 2 [ MCSCLR 1 ] 1 [ MCSCLR 0 ] 4 75 LG
2) MCS 2 MCSCLR 0 0 2 P0001 [ MCS 0 ] ( P0020 ) MCS 0 4 2 8 10 P0002 P0003 M0001 M0002 ( P0021 ) [ MCS 1 ] ( P0022 ) ( P0023 ) MCS 1 12 [ MCSCLR 0 ] 13 [ EN ] MCS On/Off Off MCS ~ MCSMLR MCS(MCSCLR) : Off : () OUT : SET, RST : 4 76 LG
LINE [MCS, MCSCLR ] PLC (MCS, MCSCLR) = = P0001 P0004 P0003 P0005 P0020 P0002 P0007 P0009 P0006 P0021 P0002 P0007 P0021 0 3 5 P0002 P0020 P0001 P0007 [ MCS 0 ] ( M0010 ) ( M0011 ) 8 9 12 15 P0001 P0003 P0007 P0004 P0009 [ MCSCLR 0 ] [ MCS 1 ] ( M0020 ) ( M0021 ) 18 19 M0010 P0005 [ MCSCLR 1 ] ( P0020 ) M0020 23 28 M0011 P0021 P0006 ( P0021 ) [ EN ] 4 77 LG
47 (, NOT ) 471 M P K L F T C S # O O O O* 2 ) 1 On P 1 On 1) Off On 1 On Off 2) P0002 (Off On ) P0002 M0002 P0020 [ M0002 ] ( P0020 ) 1 On P0020 P0002 M0002 P0020 1 On 1 On P0020 4 78 LG
: On/Off [ ] 1 PB0 On, Off PB0 On/Off 2 P000 P002 PB0 0 1 2 3 0 1 2 On/Off 3 0 2 P0020 M0000 [ M0000 ] ( P0020 ) 9 P0020 M0000 10 [ EN ] 4 P0020 4 LG 79
(P0020) P0001 EN P0020 P0020 P000 P001 P020 OFF OFF OFF OFF ON ON ON OFF ON ON ON ON ( ) 3 (:ON, P0001:OFF) PLC OFF P00 ON P20 ON PLC P20 ON ('1') 2 P01 OFF P20 OFF ('0') EN (OFF) OR P0001 P0020 EN P0001 M0000 M0001 M0000 M0001 P0020 (M) EN 4 80 LG
: [ ] 1 PB0 1 ON, 2 ON, 3 ON PB0 PB1 PLC 2 P000 P002 PB0 PB1 0 1 2 3 0 1 2 M M 1 M 2 3 ( ) 3 P000 P001 P020 P021 P022 4 LG 81
4 M0000 M0000 P0021 P0001 P0022 1 P0022 M0000 P0020 P0001 P0021 2 P0021 M0000 P0001 P0020 3 P0020 EN 5 1 PB0 ON M0000 P021 P001 P022 1 ST M0000 P020 P001 P021 SCAN M0000 P001 P020 1 ST M0000 P021 P001 P022 SCAN M0000 P020 P001 P021 M0000 P001 P020 2 PB0 ON M0000 P021 P001 P022 1 ST M0000 P020 P001 P021 SCAN M0000 P001 P020 1 PB0 ON P20 ON 1 ST M0000 P021 P001 P022 SCAN M0000 P020 P001 P021 M0000 P001 P020 3 PB0 ON M0000 P021 P001 P022 2 PB0 ON P21 ON 1 ST M0000 P020 P001 P021 1 PB0 ON P20 ON SCAN M0000 P001 P020 1 ST M0000 P021 P001 P022 SCAN M0000 P020 P001 P021 M0000 P001 P020 : (a :ON, b :OFF) 4 82 LG
472 NOT M P K L F T C S # NOT O O O O* 2 NOT ) 1 On P 1 On NOT 1) On Off 1 On Off 2) On Off NOT M0000 P0021 [ NOT M0000 ] ( P0021 ) 1 On P0021 M0000 P0021 1 On P0021 4 83 LG
48 (SET,RST) 481 SET M P K L F T C S # SET O O O O* O 1 SET SET 1) On On Off On 2) On Off P0020, P0021 ( P0020 ) [ SET P0021 ] P0020 P0021 4 84 LG
482 RST M P K L F T C S # RST O O O O* O 1 RST On On RST 1) On Off Off Off 2) On Off P0020, P0021 P0021 Off P0001 ( P0020 ) [ SET P0021 ] [ RST P0021 ] P0021 P0001 ( P0021 ) P0001 P0020 P0021 4 85 LG
P K, / 1 (P) (K), On P0020 ( P0020 ) K0000 ( K0000 ) P0020 K0000 2 SET/RST (P) (K) / 1(On), (P) (K), [ SET P0020 ] [ SET K0000 ] [ RST P0020 ] P0020 [ RST K0000 ] K0000 4 86 LG
K (Latch area ) evice M L M0000 M191F L000 L063F T(100ms) T000 T191 T144 191 T(10ms) T192 T255 T240 T255 C C000 C255 C240 C255 K80S, K200S, K300S 0000 4999 3500 4500 K1000S 0000 9999 6000 8999 S S0000 S9999 S80 S99 evice M L T(100ms) T(10ms) C M000 M31F ( M000~M15F ) L000 L15F (L000~L07F ) T000 T095 ( T000~T031) 0096 0127 (0032~0047) C000 C127 (C000~C015) L000 L015F ( L000~L07F ) T072 T095 (T024~T031) T120 T127 (T044~T047) C096 C127 (C012~C015) K10S1 000~063 048 063 K10S, 30S, 60S, 100S 000 255 192 255 S S0000 S3199 (S0000~S1599) S80 S99 (S12~S15) ( ) K10S1 233 4 87 LG
KGL-WIN evice K200S L,M 4 88 LG
49, (STEP CONTROLER) 491 (SET S) M P K L F T C S # SET S O 1 Sxx xx SET Sxxxx No (00 ~ 99) (00 ~ 99) SET Sxxxx( ) 1) On On On Off On On On SET Sxxxx Sxx00 On 2) -S01 0 P0001 2 P0002 4 P0003 8 P0004 Reset 10 SET S0101 SET S0102 SET S0103 SET S0104 SET S0100 On On P000 P001 P002 P003 P004 S0101 S0102 S0103 S0104 S01 4 89 LG
( ) 99 (STEP) () On On 1 0, 2 1 ON (SET) On 0 1 2 99 99 99 99 0 1 2 0 3 1 4 2 3 0 4 1 2 3 4 1 2 3 4 99 0 ( ) 4 90 LG
6 [SET S ] 1 2 3, 4, 1 Reset 1 2 3 S0001 S0002 SET S0000 SET S0001 SET S0002 SET S0003 SET S0004 1 1 ( ) 2 2 ( ), Reset 1 S0001 2 S0002 3 S0003 4 S0004 S0003 3 3 ( ) S0004 4 4 ( ) [ EN ] 4 91 LG
492 (OUT S) M P K L F T C S # OUT S O O O O* O 1 ( Sxxxx ) S xx xx No (00 ~ 99) (00 ~ 99) OUT Sxxxx( ) 1) On On On On Off On 2) S02 Reset P0020 P0021 P0022 P0023 ( S0201 ) ( S0223 ) ( S0298 ) ( S0200 ) No P020 P021 P022 P023 S0201 S0223 S0298 S0200 1 On Off Off Off O 2 On On Off Off O 3 On On On Off O 4 On On On On O 4 92 LG
7 1 ON B C A ON A A B C P0002 P0003 P0004 P0005 (P20) (P21) (P20) A B C (P21) 2 P000 P002 A B 0 1 2 3 0 1 2 M Mag S/W M Mag S/W C 4 5 3 P0002 P0003 P0004 P0005 P0020 P0021 4 LG 93
3 P0001 SET M000 RST M000 (A) P0002 S0099 P01 ON ON P0003 SET S0000 PLC ON P0004 SET S0002 S01 ON P0005 SET S0003 S02 ON M0000 SET S0001 S00 ON MCS 0 S0000 M0001 S0002 S0001 S0003 M0002 MCSCLR 0 M0001 P0005 P0020 () M0002 S0099 P0002 P0021 () EN 4 LG 94
GSIKGL KGLWIN STEP 1 1 2 GSIKGL STEP 2 1 2 GSIKGL 3 (*cmt) 4 (*pgm), (*cmt) 4 95 LG
STEP 3 1 2 ( ) 4 96 LG
410 (TON,TOFF,TMR,TMON,TRTG) 4101 ON elay (TON) M P K L F T C S # TON O O O 3 TON ( t ) = (01 001 ) x (0~65535) TON 1) On ( t ) On Off Reset Off 0 t ( ) 2) On 20 On Off 0 P0001 On 0 T0097 P0001 [ TON T097 00200 ] ( P0025 ) [ RST T097 ] t = 20 P0025 4 97 LG
1 KGLWIN 2 100 ms T000~T255 T000~T191 10 ms T000~T255 T192~T255 KGL-WIN 4 98 LG
: [TON ] 1 2() 2 P000 P002 0 0 L 1 1 2 2 3 3 F F 3 T0 T1 P0020 4 T0001 TON T000 5 Off (05) T0000 TON T001 6 On (06) EN P0020 T000, T001 100ms 4 LG 99
4101 OFF elay (TOFF) M P K L F T C S # TOFF O O O 3 TOFF ( t ) = (01 001 ) x TOFF 1) On On Off 0 Off Reset Off 0 t ( ) 2) On T000 On P0025 On Off 0 Off P0002 On Off 0 T0000 P0002 [ TOFF T000 00050 ] ( P0025 ) [ RST T000 ] t = 5 P0025 4 100 LG
: [TON, TOFF] 1 (A B C), (C B A) 2 C B A M2 M1 M0 P000 0 1 2 3 F P002 0 1 2 3 F MC0 MC1 MC2 3 P0020 T000 T011 T010 P0021 P0022 T001 4 101 LG
4 T0010 T0000 T0011 T0000 TOFF T010 100 P0020 TON T000 50 TOFF T011 50 P0022 A (10 ) B (5 ) B (5 ) T0001 TMON T001 100 P0022 C (10 ) EN 4 102 LG
: [TON, TOFF] 1 1 2 3 2 P000 P002 0 1 2 3 0 1 2 4 5 3 P000 1 T000 2 T001 3 T002 P0020 T000 ON & T001 OFF T002 ON & T000 OFF 4 103 LG
4 TON T000 10 1 T000 ON TOFF T002 30 3 T002 ON T000 TON T001 20 T000 ON 2 T001 ON T000 T001 T002 P0020 1(T000) (P0020) ON 2(T001) OFF (T000 OFF) 3 (T000) ON EN 4 104 LG
4103 (TMR) M P K L F T C S # TMR O O O 3 TMR ( t ) = (01 001 ) x TMR 1) On, On Reset Off 0 t1 t2 () 2) On, Off, On T096 On P0021 On(t1 + t2 = 30)` Reset P0003 On 0 P0021 Off P0003 T0096 P0003 ( t ) = t1 + t2 [ TMR T096 300 ] ( P0021 ) [ RST T096 ] T0096 P0021 t = 20 t = 10 4 LG 105
: [TMR ] 1 2 P000 0 1 2 F ( ) P002 0 1 2 F L P0001 P0020 T000 3 TMR T000 36000 T0000 P0001 RST T000 1 T0000 RESET U CTU C000 C0000 R <S> 00100 100 C0000 P0001 P0020 P0020 EN () 4 LG 106
4104 (TMON) M P K L F T C S # (F110) (F111) (F112) TMON O O O 3 TOFF ( t ) = (01 001 ) x TMON 1) On On 0 Off On On, Off Reset On Off 0 ( t ) ( ) 2) On T000 On On, Off Reset P0003 On 0 Off T000 P0003 [ TMON T000 00100 ] ( P0021 ) [ RST T000 ] T0000 P0021 ( t ) 4 107 LG
10 [TMON ] 1 (), 2 P000 0 1 LS 2 T F M0000 T000 3 T0000 M0000 TMON T000 000 M0000 On M0000 02 On M0000 On 4 108 LG
4105 M P K L F T C S # TRTG O O O 3 TRTG ( t ) = (01 001 ) x TRTG 1) On On 0 Off 0 Off On Reset On Off 0 2) On T096 On 0 P0025 Off 0 Reset P0003 On 0 Off T0096 P0003 t ( ) [ TRTG T096 00050 ] ( P0025 ) [ RST T096 ] t P0025 T = 5 T = 5 4 109 LG
: [TRTG ] 1 2 P00 0 1 2 F 3 T005 TRTG T005 00200 M0100 20 M0100 Off On EN T005 M0100 20 4 110 LG
: [TRTG ] 1 3 3 2 P000 0 1 2 P002 0 1 2 CLOSE Mag S/W OPEN Mag S/W CLOSE LIMIT S/W OPEN LIMIT S/W 3 P0001 P0020 P0020 ON OPEN LIMIT ON OOR OPEN P0001 T000 P0002 TRTG T000 30 P0021 OOR OPEN 3 T0000 ON 3 CLOSE LIMIT ON OOR CLOSE EN 4 111 LG
On/Off End On/Off Off Off End 0 Off T192 [ TON T192 8] ( P000F) [ EN] P00 On 80ms T192 P0F On (T192 10ms ) SCAN EN 21ms EN 21ms EN 21ms EN 21ms EN 21ms EN 21ms EN 21ms EN 21ms 21ms TON TON TON TON TON TON TON TON TON P00 10ms 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 0 2 4 6 8 10 12 0 T192 P00F 2 1 1 10ms ( +1 ) 0 2 P00 On T192 (1 + ) 10ms +1 - -1 (100ms 10ms 4 112 LG
1 SCAN EN EN EN EN TON TON TON TON 10ms EN T192 2 1 2 1 2 1 2 5 7 9 10 +1 0 2 8 SCAN EN EN EN TON TON TON P00 +1 0 +1-1 +1-1 4 113 LG
411 (CTU,CT,CTU,CTR) 4111 (CTU) M P K L F T C S # CT O O O 3 Count Reset U CTU R <S> CTU 1) +1 On (65535) Count Reset On Off 0 Reset Count 2) Count Up P0020 On P0001 On Off 0 P0001 C0010 U CTU C010 R <S> 00010 ( P0020 ) P0001 C0010 P0020 4 114 LG
1 KGLWIN 1 2 3 RESET 4 P0001 [F5] F5 4 115 LG
: 1 1 65535 100ms (: T000) 6553,5 ) TON T000 65535 = 65535 =100ms65535 6553,5 1 24 P20 10 ON, 30 P21 10 ON 2 T0000 TON T000 36000 T000 ON b T000 T000 1SCAN TIME ON T0000 C0000 U CTU C000 R <S> 24 24 C000 ON RESET C000 C000 1SCAN TIME ON C0000 C0001 U CTU C001 R <S> 30 30 C000 ON RESET C001 C001 1SCAN TIME ON C0000 C0001 T0001 TMON T001 100 TMON T002 100 1SCAN TIME C000 10 1SCAN TIME C001 10 P0020 T0002 P0021 EN 4 LG 116
4112 OWN (CT) M P K L F T C S # CT O O O 3 Count Reset CT R <S> CT 1) 1 0 On Reset On Off Reset Count 2) 10 On Count own 0 P0020 On P0001 On Off P0001 C0010 CT C010 R <S> 00010 ( P0020 ) P0001 C0010 10 SCAN TIME (10) P0020 4 117 LG
4113 UP-OWN (CTU) M P K L F T C S # CTU O O O 3 U CTU R <S> CTU 1) Up 1 On (65535) Count own 1 Reset On 0 Up, own On Reset Pulse Pulse 2) Count Up P0020 On P0001 Count own Reset Off 0 P0001 P0002 C0000 U CTU C000 R <S> 00010 ( P0020 ) P0002 P0001 C0000 P0020 4 118 (10) LG
: [CTU ] 1 4, PB1 1, PB2 1 4 PB1, 1 PB2 2 M4 PB1 PB2 M3 M2 M1 P000 0 1 2 3 P002 0 1 2 3 3 P0001 C0005 P0001 C0005 P0001 C0005 P0001 C0005 P0001 C0005 C0001 C0002 C0003 C0004 U CTU C001 R <S> 00001 U CTU C002 R <S> 00002 U CTU C003 R <S> 00003 U CTU C004 R <S> 00004 U CTU C005 R <S> 00005 ( P0020 ) ( P0021 ) ( P0022 ) ( P0023 ) [ EN ] 1 On 2 On 3 On 4 On Reset 4 119 LG
4114 RING (CTR) M P K L F T C S # CTR O O O 3 Count Reset U CTR R <S> CTR 1) +1 Off On 0 On Reset On Off Reset Count Pulse 2) Count Up P0020 On 11 On P0020 Off 0 Reset P0001 C0010 U CTR C010 R <S> 00010 ( P0020 ) P0001 C0010 (10) P0020 4 120 LG
Coil On/Off EN On/Off ( ) Count On Count P0001 C0010 U CTU C010 R <S> 0003 ( P001F) [ EN] EN EN EN EN EN EN EN EN CTU CTU CTU CTU CTU CTU CTU CTU P0001 C010 C010 0 1 1 1 1 2 2 2 0 C010 P001F 4 121 LG
uty On, Off (%) (, T1 + T2 1) UTY T1 T1T2 n = x 100 (%) T1 + T2 T2 T1 < T2 n = x 100 (%) T1 + T2 Count Off On T1 T2 4 LG 122
: (1) 1 30 1 10 10 (P22) (P21) (P20) (P00) (P24) (P23) 2 () P0020() P0021() P0022() P0023() P0024() 4 123 LG
3 M0000 T0002 M0000 M0000 T0000 T0001 T0001 TON T000 00300 TON T001 00010 TON T002 00200 30 T0000 ON (P21) T0000 ON 1 P22, P23 ON T0001 ON 20 P20, P24 ON TON T003 00100 P23 10 T003 T005 T0002 T0004 TON T004 00010 P23 TON T005 00010 P0021 P0022 P0020 ON T0000 T0001 P0021 T0000 ON 1 ON T0001 T0002 P0022 T0001 ON CYCLE ON T0001 T0004 P0023 10 ON 10 T0001 P0024 ON EN 4 124 LG
: 1 A, B B A A A A B 10 B B A 10 B (P2B) A (P20) (P21) (P22) (P2A) (P29) (P23) (P28) (P24) (P25) (P26) (P27) 2 A B A B (P22) (P21) (P23) (P20) (P26) (P25) (P27) (P24) (P28) (P29) (P2A) (P2B) 10 1 20 1 10 1 20 1 10, 1,20,1 4 A B 4 125 LG
3 10 10 1, 20 1 10 A, B 4 126 LG
A B 4 127 LG
: 1 3 1 1 CAR HALL P000 P002 1F 2F 3F 1F 0 1 2 3 0 1 2 2F 4 3F 5 EVICE 1F 1 (CAR,HALL) 2F P0001 2 (CAR,HALL) 3F P0002 3 (CAR,HALL) 1F P0003 CAR 1 2F P0004 CAR 1 3F P0005 CAR 1 1F M0000 1 2F M0001 2 3F M0000 3 P0020 CAR P0021 CAR () 4 128 LG
3 1F 1F T0000 2F 3F 1F 2,3 1 2F 2F T0000 1F 3F 2F 1,3 2 3F 3F T0000 1F 2F 3F 1,2 3 1F 2F 1F 1F 2F 1 CAR 1, 2 CAR 1,2 3F 2F 3F 3F 2F 3 CAR 3, 2 CAR 3,2 1F 1F TMON T000 50 5 2F 2F 3F 3F EN 4 129 LG
5 51? PLC PLC 7 1 PLC 2 PLC 3 PLC 4 5 6 7,,, (), 2, (1) PLC,, 1, 3, 6 (2) PLC PLC,, 5 130 LG
52 PLC 1 () Lamp Battery Relay Fuse Program (usersoft),,, Maker Unit(I/O ),, Cable, (cable) (), Maker (, check), Master Priogram() Program, Fan Air-Filte, Check Check Check 2, Battery 2-3 (, Maker ) () 5 Maker Relay, Maker Fuse 10 5 131 LG
PLC 2, (,, ),,, (, ) 3 NO 1 Battery 1-2 3 1-2 2 Fuse Fuse ON/OFF 4 NO 1 Unit Unit 1 Relay Unit 2 CPU 1 3 Memory 1 PLC System own 4 Unit 1 5 ata NO 1 Print () 2 Floppy isk Back-UP User 5 132 LG
(%) 1 PLC () (%) 2 PLC () 5 133 LG