디자인예제보고서 제목사양애플리케이션작성자문서번호 TOPSwitch TM -JX TOP268VG 및 ChiPhy TM CHY100D 를사용한 24W HVDCP Quick Charge 2.0 호환고효율 CV/CC 어댑터 90VAC - 265VAC 입력, 12V, 9V, 5V/2A 출력 어댑터 애플리케이션엔지니어링부서 DER-381 날짜 11.04.14 개정 1.2 요약및기능 HVDCP(High Voltage Dedicated Charging Port) Quick Charge 호환 Quick Charge 2.0 클래스 A 사양완벽지원 (5V, 9V, 12V 출력전압 ) 소형 PCB, 67mm x 39mm 132kHz 스위칭주파수로트랜스포머크기감소 CV 모드에서의타이트한전압레귤레이션및 CC 모드에서의타이트한전류레귤레이션 뛰어난과도부하응답 오토리커버리기능을통해히스테리시스써멀과부하및과전압보호 파워인테그레이션스 (Power Integrations) 의 edip 로우프로파일패키지 -4dB 이상의 QP 마진으로전도성 EMI 충족 특허정보여기에설명한제품및애플리케이션 ( 제품의외장트랜스포머구성및회로포함 ) 은하나이상의미국및해외특허의대상이되거나파워인테그레이션스 (Power Integrations) 에서출원중인미국및해외특허신청의대상이될수있습니다. 파워인테그레이션스 (Power Integrations) 의전체특허목록은 에서확인할수있습니다. 파워인테그레이션스 (Power Integrations) 는고객에게 http:///ip.htm 에명시된특정특허권에따라라이센스를부여합니다. Power Integrations 5245 Hellyer Avenue, San Jose, CA 95138 USA.
목차 1 소개... 4 2 파워서플라이사양... 7 3 회로도... 8 4 회로설명... 9 4.1 High Voltage Dedicated Charging Port(CHY100D) Quick Charge 기능... 9 4.2 입력 EMI 필터링... 9 4.3 TOPSwitch-JX 1 차측... 9 4.4 써멀과부하보호... 10 4.5 출력정류, 필터링, 2 차측바이어스및피드백제어... 10 5 PCB 레이아웃... 12 6 BOM... 13 7 트랜스포머사양... 15 7.1 전기적구성도... 15 7.2 전기적사양... 15 7.3 재료... 15 7.4 제작구성도... 16 7.5 구성... 17 7.6 권선그림... 18 8 커먼모드코크사양 (L3)... 27 8.1 전기적구성도... 27 8.2 전기적사양... 27 8.3 재료... 27 8.4 권선지침... 27 8.5 그림... 27 9 트랜스포머디자인스프레드시트... 28 10 U1 히트싱크어셈블리... 32 10.1 히트싱크제작도면... 32 10.2 히트싱크어셈블리도면... 33 10.3 히트싱크및 U1 어셈블리도면... 34 11 성능데이터... 35 11.1 풀부하효율... 35 11.2 액티브모드효율... 36 11.3 에너지효율기준... 39 11.3.1 2007 미국에너지독립및안보법... 40 11.3.2 ENERGY STAR EPS 버전 2.0... 40 11.4 무부하시의입력전력... 41 11.5 CV/CC... 42 12 써멀성능... 45 13 파형... 47 Power Integrations, Inc. Page 2 of 72
13.1 드레인전압및전류, 정상동작... 47 13.2 출력전압스타트업프로파일... 47 13.2.1 5V, 2A CR 부하스타트업... 47 13.2.2 5V, 0.2 A CR 부하스타트업... 48 13.3 드레인전압및전류스타트업프로파일... 49 13.4 출력다이오드피크역전압... 49 13.5 과도부하응답... 50 13.5.1 12V 출력, 0.5A - 1.75A - 0.5A 부하단계... 50 13.5.2 5V 출력, 0.5A - 1.75A - 0.5A 부하단계... 51 13.6 출력리플측정... 52 13.6.1 리플측정기술... 52 13.6.2 PCB 의측정결과... 53 13.7 출력전압전환... 55 13.7.1 풀부하 2A 에서출력증가... 55 13.7.2 하프부하 1A 에서출력증가... 56 13.7.3 경부하 0.15A 에서출력증가... 57 13.7.4 풀부하 2A 에서전압감소... 58 13.7.5 하프부하 1A 에서전압감소... 59 13.7.6 경부하 0.15A 에서전압감소... 60 13.8 USB 언플러그파형... 62 13.8.1 9V USB 언플러그파형... 62 13.8.2 12V USB 언플러그파형... 62 13.9 컨트롤루프측정... 63 13.9.1 12V 루프테스트... 63 13.9.2 5V 루프테스트... 63 14 전도성 EMI... 64 15 부록 A - 특수조립지침... 67 15.1 재료... 67 15.2 트랜스포머설치 (T1)... 67 15.3 히트싱크설치... 68 15.4 커패시터설치 (C2)... 69 15.5 RTV 적용 (C1 및 L3)... 70 16 개정내역... 71 중요사항 : 이기판은안전절연거리요구사항에맞도록디자인되었지만엔지니어링프로토타입은아직기관승인을받지않은상태입니다. 따라서 AC 입력을프로토타입보드에제공하도록절연트랜스포머를사용하여모든테스트를수행해야합니다. Page 3 of 72 Power Integrations
1 소개 이문서는 TOPSwitch-JX TOP268VG 를사용한어댑터파워서플라이에관한엔지니어링보고서입니다. 이파워서플라이는 ChiPhy 제품군의범용평가플랫폼으로고안되었습니다. CHY100D 를사용하여설계된이어댑터는유니버설입력에서작동하고선택가능한출력전압 (5V, 9V, 12V 중에서선택 ) 과 2A 의최대정전류를제공합니다. TOPSwitch-JX 는설계상광범위한출력부하범위에걸쳐효율을거의일정하게유지하므로특수한작동모드를사용하지않고도특정부하에서의필요한효율값을충족합니다. 따라서기존에너지효율성규정및새로운에너지효율성규정에맞게성능을최적화합니다. 효율이일정하게유지되므로재설계없이도향후의에너지효율성규정변경사항에맞게설계를최적화할수있습니다. TOPSwitch-JX 의낮은 MOSFET 커패시턴스로인해일반적디스크리트 MOSFET 에서발생하는효율저하가없어서높은스위칭주파수가가능합니다. 디스크리트 MOSFET 에사용되는스위칭주파수가 40kHz~60kHz 가아니라 132kHz 이므로트랜스포머크기가줄고비용도감소합니다. 이파워서플라이는 230VAC 의무부하 300mW 미만에서 Energy Star 2.0 80% 이상의평균효율을충족하며 4dB 이상의마진으로 CISPR 전도성 EMI 를충족합니다. 이파워서플라이는큰히스테리시스를갖는오토리커버리기능을통해써멀과부하보호기능을제공합니다. 이는 1 차측센싱출력과부하및과전압보호기능으로, 한가지의고장상태에서도작동합니다. 이문서에서는사양, 회로도, 부품목록, PCB 레이아웃및트랜스포머설계, 구성정보등전반적인설계에대해자세히설명합니다. 이정보에는레귤레이션, 효율, 과도부하및전도성 EMI 측정과관련된성능결과가포함되어있습니다. Power Integrations, Inc. Page 4 of 72
Figure 1 Plastic Enclosure (Dimension: 74 mm x 44 mm x 23 mm). Page 5 of 72 Power Integrations
Figure 2 Populated Circuit Board Photograph, Top. Figure 3 Populated Circuit Board Photograph, Bottom. Power Integrations, Inc. Page 6 of 72
2 파워서플라이사양 아래표는디자인의최소허용성능을나타냅니다. 실제성능은결과섹션에나열되어있습니다. 설명기호최소기준값최대단위설명 입력전압 V IN 90 265 VAC 2 선식 - P.E. 없음 주파수 f LINE 47 50/60 64 Hz 무부하시의입력전력 (230VAC) 0.15 W 5V 출력출력전압 1 V OUT1 12 V 2%, PCB 출력전류 1 I OUT1 0 2 A 출력리플전압 1 V RIPPLE1 120 mv PP 20MHz 대역폭 출력전압 2 V OUT2 9 V 2%, PCB 출력전류 2 I OUT2 0 2 A 출력리플전압 2 V RIPPLE2 100 mv PP 20MHz 대역폭 출력전압 3 V OUT3 5 V 2%, PCB 출력전류 3 I OUT3 0 2 A 출력리플전압 3 V RIPPLE3 100 mv PP 20MHz 대역폭 총출력전력 P 연속출력전력 P OUT 24 W OUT 25 C 에서측정, 12V 출력 - 1.5A 부하 효율 P 풀부하 85 % OUT 25 C 에서측정, 12V 출력 - 1.5A 부하 25, 50, 75 및 100% 의 P OUT 에서 ENERGY STAR V2.0 기준 필요한평균효율성 ES2.0 82 % 환경 전도성 EMI 안정성 CISPR22B/EN55022B 충족 IEC950/UL1950 클래스 II 를충족하도록설계됨 주변온도 T AMB -5 25 35 C 자유대류, 임해고도 Page 7 of 72 Power Integrations
3 회로도 Figure 4 Schematic. Power Integrations, Inc. Page 8 of 72
4 회로설명 이파워서플라이는플라이백토폴로지로 TOP268VG 일체형오프라인스위처 IC(U1) 를사용하였고유니버셜입력으로작동하며선택가능한출력 ( 예 : 12V - 2A, 9V - 2A, 5V - 2A 출력 ) 을제공하는낮은무부하, 고효율및초소형의파워서플라이입니다. IC U1 은 725V MOSFET 과멀티모드컨트롤러를포함합니다. U1 은 CONTROL(C) 핀에공급되는전류를기준으로 MOSFET 듀티사이클을조정하여출력을레귤레이션합니다. 4.1 High Voltage Dedicated Charging Port(CHY100D) Quick Charge 기능 이파워서플라이는선택가능한출력전압 (5V, 9V, 12V 중에서선택 ) 과 2A 의최대정전류를제공하도록설계되었습니다. 기본출력 ( 예 : 무부하연결 ) 은 5V 입니다. 출력전압은부하에서 D+ 및 D-를통해연결되는로직신호에따라선택됩니다. 로직신호는출력에서낮은로직신호 ( 예 : V1-SEL_N, V1-SEL_N, V3-SEL_N) 를생성하고분배네트워크 R17, RN1, RN2 및 RN3 의노드를풀다운하여해당하는출력전압을제공합니다. 4.2 입력 EMI 필터링 퓨즈 F1 은치명적인고장발생시회로를보호하고 AC 소스로부터회로를절연합니다. 다이오드 BR1 은 AC 입력을정류합니다. 커패시터 C1 및 C2 는발생하는 DC 를필터링합니다. 벅커패시터 C1 은디퍼렌셜모드노이즈 EMI 를줄입니다. 인덕터 L3 은커먼모드 EMI 를필터링합니다. 이입력필터는블리드저항없이 UL 표준 60950-1 을충족하므로 AC 소스의안전한제거를가능하게합니다. 4.3 TOPSwitch-JX 1 차측 U1 의 EcoSmart 기능은전체부하범위에걸쳐일정한효율을자동으로제공합니다. 이기능은고유의 MCM( 멀티사이클모듈레이션 ) 기능을사용하므로특정부하에서특수한작동모드를트리거할필요가없습니다. 따라서일반적이지않거나특정한작동조건또는부하기준값에대한별도의설계가필요없으므로회로설계가간소화됩니다. 132kHz 의스위칭주파수를선택하여트랜스포머크기를최소화했습니다. 이와같은고주파수동작은매우낮은커패시턴스의 PI 파워 MOSFET 기술과고유의주파수지터기능덕분에효율이나 EMI 에큰영향을주지않습니다. TOP268VG 는 CONTROL(C) 핀에공급되는전류를기준으로듀티사이클을조정하여출력을레귤레이션합니다. 파워서플라이출력전압및전류는 2 차측에서션트레귤레이터 U2 에의해감지되며옵토커플러 U3 을통해 1 차측에피드백신호를제공합니다. 커패시터 C8 은 U1 에대한오토 - 리스타트타이밍, 스타트업및루프보정기능을제공합니다. 스타트업시이커패시터는 DRAIN(D) 핀을통해충전됩니다. 충전이되면 U1 은스위칭을시작합니다. 커패시터 C8 은에너지를충분히저장하여파워서플라이 Page 9 of 72 Power Integrations
출력이레귤레이션에도달하는데필요한에너지를공급합니다. 스타트업후바이어스권선은옵토커플러를통과하여 CONTROL 핀으로흐르는전류를통해컨트롤러에전력을공급합니다. 바이패스커패시터 C6 은 U1 에물리적으로최대한가깝게배치됩니다. 저항 R9 는피드백루프를추가로보정합니다. C4, R2, R3, R4, R41 및 D5 로구성되는클램프네트워크는드레인전압을제한하고 (MOSFET 턴오프시스파이크방지 ) 트랜스포머누설인덕턴스에너지를줄입니다. 높은입력전압에서무부하입력전력을더욱향상시키기위해 C 핀에서 V 핀으로 25 A 의전류를제공하는저항 R19 를추가했습니다. 이는 CONTROL 핀의작동지점을변경합니다 ( 라인피드포워드기능 ). R19 를장착하면지정된듀티사이클을설정하기위해 CONTROL 핀으로흐르는절대전류가최대 50% 감소하여바이어스권선과출력모두에서전력소비가줄어듭니다. 입력센싱저항 R5 및 R6 값은컷인전압을약 75VAC 로설정합니다. X 핀저항 R1 은 U1 의내부전류제한값을줄이도록설정되어있습니다. 따라서서플라이는하이라인에서는출력전력을 100VA 미만으로제한하고로우라인에서는정격출력을제공할수있습니다. 4.4 써멀과부하보호 IC U1 은완벽히테스트된정확한래칭써멀과부하보호기능을제공합니다. 정션온도가 +142 C( 고장상태중 ) 에도달하면 U1 이셧다운됩니다. 입력전압이제거되고 C1 및 C2 가방전되면래치상태가리셋됩니다. 4.5 출력정류, 필터링, 2 차측바이어스및피드백제어 쇼트키다이오드 D8 은출력을정류합니다. 스너버네트워크 (C14, R11) 는다이오드양단의링잉을억제하고고주파수전도성및방사노이즈를줄입니다. 고주파수링잉을억제하는동시에무부하에서이로인해발생하는전력손실을최소로유지하기위해이두부품은작은값으로선택했습니다. 페라이트비드 L2 및커패시터 C13 은출력 2 차측필터를구성합니다. 커패시터 C11 및 C24 는출력필터링을제공합니다. CV/CC 기능때문에 2 차측바이어스는출력전압 ( 플라이백권선 ) 및포워드바이어스권선모두를고려하여지정해야합니다. CV 작동모드에서는 D16 이출력전압에의해차단되므로 2 차측바이어스는출력전압으로부터공급됩니다. 다이오드 D14 및 C27 은포워드바이어스권선을정류하고 Q3, R34, R43 및 VR4 로구성되는선형레귤레이터는 C27 의전압을약 4V 의일정한전압으로변환합니다. CC 작동모드에서는출력전압이선형레귤레이터의출력전압보다낮아지면 2 차측컨트롤회로가포워드권선에서바이어스됩니다. Power Integrations, Inc. Page 10 of 72
저항 R16, RN1, RN2, RN3 및 R17 은전압분배기를구성하고출력의 DC 설정포인트를설정합니다. 출력전압은사전프로그래밍된마이크로컨트롤러가실장된외부전환보드를통해선택됩니다. 마이크로컨트롤러는 USB 단자 D+ 및 D- 에서보내는로직신호를기준으로부하에필요한출력전압 ( 예 : 5V, 9V, 12V) 을결정합니다. 커패시터 C9 및 R15 는피드백컨트롤루프를보정합니다. 반면커패시터 C18 및저항 R22 는정전류모드로작동할때보정피드백컨트롤을제공합니다. 저항 R13 및 R44 는피드백시스템의게인을제한하여전체작동범위에서파워서플라이안정성을보장합니다. RC 네트워크 C23 및 R28 은높은크로스오버주파수에서위상부스트를제공합니다. 저항 R13, R45, R46 및 Q4 는높은전압에서 5V 로의출력전환중출력커패시터를방전하는데사용됩니다. 경부하에서는피드백전압이장시간레퍼런스보다높아에러엠플리파이어 (Error Amplifier) 를포화시켜막대한언더슈트를초래할수있으므로출력방전네트워크가매우중요합니다. Page 11 of 72 Power Integrations
5 PCB 레이아웃 Figure 5 Printed Circuit Layout Top and Bottom (69.5 mm x 39.5 mm). Power Integrations, Inc. Page 12 of 72
6 BOM Item Qty Ref Des Description Mfg Mfg Part Number 1 1 BR1 600 V, 0.5 A, Bridge Rectifier, SMD, MBS-1, 4-SOIC MB6S-TP Micro Commercial 2 1 C1 10 F, 400 V, Electrolytic, Low ESR, 79 ma, (10 x 12.5) TYD2GM100G13O Ltec 3 1 C2 47 F, 400 V, Electrolytic, Low ESR, (12.5 x 30) EPAG401ELL470MK30S Nippon Chemi-Con 4 2 C4 C14 1 nf, 250 V, Ceramic, X7R, 0805 GRM21AR72E102KW01D Murata 5 4 C6 C9 C18 C26 100 nf 50 V, Ceramic, X7R, 0603 C1608X7R1H104K TDK 6 1 C7 10 F, 50 V, Ceramic,X5R, 1210 UMK325BJ106KM-T Taiyo Yuden 7 1 C8 47 F, 16 V, X5R, 1206 3216X5R1C476M TDK 8 2 C11 C24 470 F, 25 V, Electrolytic, Very Low ESR, 38 m, (10 x 16) EKZE250ELL471MJ16S Nippon Chemi-Con 9 1 C13 47 F, 25 V, Electrolytic, Low ESR, 500 m, (5 x 11.5) ELXZ250ELL470MEB5D Nippon Chemi-Con 10 2 C23 C29 220 nf, 25 V, Ceramic, X7R, 0603 06033D224KAT2A AVX 11 2 C27 C30 10 F, 25 V, Ceramic, X7R, 1206 C3216X7R1E106M TDK 12 1 C28 47 nf, 310 VAC, Polyester Film, X2 BFC233920473 Vishay 13 1 C31 10 nf 50 V, Ceramic, X7R, 0603 C0603C103K5RACTU Kemet 14 1 C32 470 nf, 50 V, Ceramic, X7R, 0603 UMK107B7474KA-TR Taiyo Yuden 15 1 CY1 1 nf, 500Vac, Ceramic, Y1 VY1102M35Y5UG63V0 Vishay 16 1 D5 600 V, 1 A, Rectifier, Glass Passivated, POWERDI123 DFLR1600-7 Diodes, Inc. 17 2 D6 D14 250 V, 0.2 A, Fast Switching, 50 ns, SOD-323 BAV21WS-7-F Diodes, Inc. 18 1 D8 100 V, 8 A, Schottky, TO-220AC 8TQ100PBF Vishay 19 2 D15 D16 30 V,0.2 A, Schottky, SMD, SOT-23 BAT54ALT1G Diodes, Inc. 20 1 F1 5 A, 250 V, Fast, Microfuse, Axial 0263005.MXL Littlefuse 21 2 FL1 FL2 PCB Terminal Hole, 22 AWG N/A N/A 22 1 FL3 PCB Terminal Hole, 30 AWG N/A N/A 23 1 HS1 Heat Sink, Custom, Al, 1100, 0.032" Thk Custom 24 1 J1 AC Input Receptacle S-01-02A Sunfair 25 1 J3 CONN USB FMALE TYPE A USB-AF-DIP-094-H GOLDCONN 26 1 L2 3.5 mm x 4.45 mm, 68 at 100 MHz, #22 AWG hole, Ferrite Bead 2743001112 Fair-Rite 27 1 L3 8 mh, xa, Ferite Toroid, 4 Pin, Output SNX-1710 Santronics 28 1 Q2 open 29 1 Q3 NPN, Small Signal BJT, GP SS, 40 V, 0.6 A, SOT-23 MMBT4401LT1G Diodes, Inc. 30 1 Q4 PNP, Power BJT, 70 V, 2 A, TO-92 ZTX792A Zetex 31 1 R1 15.4 k, 1%, 1/8 W, Thick Film, 0805 ERJ-6ENF1542V Panasonic 32 2 R2 R3 75 k, 5%, 1/4 W, Thick Film, 1206 ERJ-8GEYJ753V Panasonic 33 2 R4 R41 91, 5%, 1/4 W, Thick Film, 1206 ERJ-8GEYJ910V Panasonic 34 2 R5 R6 5.1 M, 5%, 1/4 W, Thick Film, 1206 ERJ-8GEYJ515V Panasonic 35 1 R9 6.8, 5%, 1/10 W, Thick Film, 0603 ERJ-3GEYJ6R8V Panasonic 36 1 R11 22, 5%, 1/4 W, Thick Film, 1206 ERJ-8GEYJ220V Panasonic 37 2 R13 R44 280, 1%, 1/16 W, Thick Film, 0603 ERJ-3EKF2800V Panasonic 38 2 R15 R34 0, 5%, 1/8 W, Thick Film, 0805 ERJ-6GEY0R00V Panasonic 39 1 R16 84.5 k, 1%, 1/16 W, Thick Film, 0603 ERJ-3EKF8452V Panasonic Page 13 of 72 Power Integrations
40 1 R17 26.7 k, 1%, 1/16 W, Thick Film, 0603 ERJ-3EKF2672V Panasonic 41 1 R19 191 k, 1%, 1/16 W, Thick Film, 0603 ERJ-3EKF1913V Panasonic 42 1 R20 0.22, 1%, 1/4 W, Thick Film, 1206 ERJ-8RQJR22V Panasonic 43 3 R21 R43 1 k, 5%, 1/10 W, Thick Film, 0603 ERJ-3GEYJ102V Panasonic 44 1 R22 5.1 k, 5%, 1/8 W, Thick Film, 0805 ERJ-6GEYJ512V Panasonic 45 1 R26 4.53 k, 1%, 1/16 W, Thick Film, 0603 ERJ-3EKF4531V Panasonic 46 1 R27 127 k, 1%, 1/16 W, Thick Film, 0603 ERJ-3EKF1273V Panasonic 47 1 R28 20, 5%, 1/10 W, Thick Film, 0603 ERJ-3GEYJ200V Panasonic 48 1 R29 390 k, 5%, 1/10 W, Thick Film, 0603 ERJ-3GEYJ394V Panasonic 49 1 R30 0.15, 5%, 1/4 W, Thick Film, 1206 ERJ-8RSJR15V Panasonic 50 1 R37 0, 5%, 1/10 W, Thick Film, 0603 ERJ-3GEY0R00V Panasonic 51 1 R38,R40,R42,RN3 open 52 1 R45 20, 5%, 1/4 W, Thick Film, 1206 ERJ-8GEYJ200V Panasonic 53 1 R46 20, 5%, 1/4 W, Carbon Film CFR-25JB-20R Yageo 54 1 RN1 26.1 k, 1%, 1/16 W, Thick Film, 0603 55 1 RN2 33.2 k, 1%, 1/16 W, Thick Film, 0603 56 1 RN3 open ERJ-3EKF2612V ERJ-3EKF3322V Panasonic Panasonic 57 1 RV1 250 V, 21 J, 7 mm, RADIAL LA V250LA4P Littlefuse Bobbin, RM7/I, Vertical, 8 pins with CSV-RM7-1S-8P-C. Clip PN Ferroxcube mtg clip CLI/P-RM7 CLI/P-RM7 58 1 T1 Transformer SNX-R1711 Santronics Transformer POL-JX025 Premier Magnetics 59 1 U1 TOPSwitch-JX, edip-12p TOP268VG Power Integrations 60 1 U2 IC CONTROLLER CC/CV SMPS, SOT23-6 TSM1052 ST Micro 61 1 U3 Optocoupler, 80 V, CTR 80-160%, 4- Mini Flat PC357N4J00F Sharp 62 1 U4 High Voltage Driver CHY100D Power Integrations 63 1 VR3 open 64 1 VR4 4.7 V, 5%, 150 mw, SSMINI-2 DZ2S047M0L Panasonic 65 1 INSULATION1 Tubing & Sleeving-Non Shrink, #20 Parker/Texloc TFT20-NT AWG TUBING PTFE (Atlantic Tubing) 66 1 TAPE1 THERMAL TAPE DOUBLE SIDED.008" BOND PLY 108 10X10" Bergquist 67 1 RTV1 RTV 670810.10ZCLR Silico RTV670810.10ZCLR GE 68 1 Jumper 0.4 inch #24 AWG, 0.4 (next to R46) 1808 Alpha Power Integrations, Inc. Page 14 of 72
7 트랜스포머사양 7.1 전기적구성도 1 FL1 WD3 (1 st Primary): 59T #31AWG WD1 (1 st Secondary): 4.5T 2 x #25AWG_TIW 8 1 WD4 (Shield): 1 turn of Copper Foil WD5 (2 nd Secondary): 4.5T 2 x #25AWG_TIW FL2 7 WD2 (Bias): 18T #30AWG 6 FL3 WD6 (Bias): 3T #32AWG_TIW 4 Figure 6 Transformer Electrical Diagram. 7.2 전기적사양 Electrical Strength 1 second, 60 Hz, from pins 1-8 to pins FL1-FL2. 3000 VAC Primary Inductance Pins 1-8, all other windings open, measured at 132 khz, 0.4 V RMS. 570 H +5% Resonant Frequency Pins 1-8, all other windings open. >1 MHz Primary Leakage Pins 1-8, with pins FL1-FL2 shorted, measured at 132 khz, Inductance 0.4 V RMS. <15 H 7.3 재료 Item Description [1] Core: RM7/I Ferroxcube 3F3 - RM07. [2] Bobbin: RM7/I, Vertical, 8 pins (4/4); PI P/N: 25-01014-00. [3] Magnet wire: #31 AWG (double coated). [4] Magnet wire: #30 AWG (double coated). [5] Magnet wire: #25 AWG Triple Insulated Wire. [6] Cooper Foil Tape: 2 mils thick, 6.5 mm wide, 42 mm length, see figures and pictures below for construction. [7] Tape: 3M 1298 Polyester Film, 7.0mm wide. [8] Tape: 3M 1298 Polyester Film, 11 mm wide. [9] Magnet wire: #32 AWG Triple Insulated Wire. [10] Varnish. Page 15 of 72 Power Integrations
7.4 제작구성도 4 FL3 WD6 (Bias): 3T #32AWG_TIW FL2 1 1 WD5 (2 nd Secondary): 4.5T 2 x #25AWG_TIW WD4 (Shield): 1 turn of Copper Foil 8 6 7 FL1 WD3 (Primary):59T #31AWG (2 1/2 LAYERS) WD2 (Bias): 18T #30AWG WD1 (1 st Secondary): 4.5T 2 x #25AWG_TIW Figure 7 Transformer Build Diagram. #31 AWG, connected to pin 1 6.5mm 42.0mm Figure 8 Copper Foil Tape. This V notch indicates pin 1 side 8 6 1 7 5 4 3 2 Figure 9 Pin Out of Bobbin RM7/I 8 Pins(4/4). Power Integrations, Inc. Page 16 of 72
7.5 구성 Bobbin preparation Position the bobbin on the mandrel so pin side on the left hand side. Winding direction is clockwise direction. Take about 16 of wire item [5] and leave start end about 1/2 inch at pin 5 WD1 position for FL1, wind 4.5 bifilar turns of item from left to right and let the 1 st Secondary remaining wires hang to the rightmost of the bobbin. Note that the remaining wires will be used in WD6. Insulation 1 layer of tape item [7]. WD2 Bias Start at pin 7, wind 18 turns of item [4] from left to right, spread the wires evenly on the bobbin, and bring the wires back to the left to terminate at pin 6. Insulation 1 layer of tape item [7]. Start at pin 8, wind 22 turns of wire item [3] from left to right for the first layer, WD3 Primary then from right to left 22 turns for second layer, continue from left to right 15 turns for third layer, and terminate at pin 1. Place tape item [7] between each layer. Insulation 1 layer of tape item [7]. WD4 Shield Use copper tape item [6], start at pin 1wind 1 turn, should be overlapped and tuck with tape item [7] when apply tape for insulation to avoid shorting. Insulation 1 layer of tape item [7]. WD5 2 nd Secondary Continue winding the remaining wires from WD1 for 4.5 turns and leave 1/2 inch near pin 5 (FL2). Insulation 1 layer of tape item [7] WD6 Bias Start at pin 5 position, also leave ~1 of item [9] for FL3, wind 3 turns from left to right, spread the wires evenly on the bobbin, and bring the wires back to the left to terminate at pin 4. Insulation 2 layers of tape item [7]. Finish Gap cores to get 570 H inductance. Assemble and secure the cores with clips. Dip varnish then dry. Page 17 of 72 Power Integrations
7.6 권선그림 Bobbin Preparation Position the bobbin on the mandrel so pin side on the left hand side. Winding direction is clockwise direction. FL1 WD1 1 st Secondary Take about 16 of wire item [5] and leave start end about 1/2 inch at pin 5 position for FL1, wind 4.5 bifilar turns of item from left to right and let the remaining wires hang to the rightmost of the bobbin. Note that the remaining wires will be used in WD6. Power Integrations, Inc. Page 18 of 72
Insulation 1 layer of tape item [7]. WD2 Bias Start at pin 7, wind 18 turns of item [4] from left to right, spread the wires evenly on the bobbin, and bring the wires back to the left to terminate at pin 6. Page 19 of 72 Power Integrations
Insulation 1 layer of tape item [7]. WD3 Primary Start at pin 8, wind 22 turns of wire item [3] from left to right for the first layer, then from right to left 22 turns for second layer, Power Integrations, Inc. Page 20 of 72
Page 21 of 72 Power Integrations
WD3 Primary (Cont d) continue from left to right 15 turns for third layer, and terminate at pin 1. Place tape item [7] between each layer. Power Integrations, Inc. Page 22 of 72
Insulation 1 layer of tape item [7]. WD4 Shield Use copper tape item [6], start at pin 1wind 1 turn, should be overlapped and tuck with tape item [7] when apply tape for insulation to avoid shorting. Page 23 of 72 Power Integrations
Insulation 1 layer of tape item [7]. WD5 2 nd Secondary Continue winding the remaining wires from WD1 for 4.5 turns and leave 1/2 inch near pin 5 (FL2). Power Integrations, Inc. Page 24 of 72
FL1 FL2 Insulation 1 layer of tape item [7]. WD6 Bias FL3 Start at pin 5 position, also leave ~1 of item [9] for FL3, wind 3 turns from left to right, spread the wires evenly on the bobbin, and bring the wires back to the left to terminate at pin 4. Page 25 of 72 Power Integrations
Insulation 2 layers of tape item [7]. Finish Gap cores to get 570 H inductance. Assemble and secure the cores with clips. Dip varnish then dry. Power Integrations, Inc. Page 26 of 72
8 커먼모드코크사양 (L3) 8.1 전기적구성도 2 3 55T- 56T #31 - #26 AWG AWG 56T 55T- - #31 #26 AWG 1 4 Figure 10 CMC Electrical Diagram. 8.2 전기적사양 Inductance (LCM) Pins 1-4 or 2-3. Measured at 100 khz. 8 mh (Min.) Leakage (LL) Pins 1-4 with pins 2-3 shorted or versa at 100 khz. 80 H (Max.) ±20% Core Effective Inductance 4400 nh/n² 8.3 재료 Item Description [1] Toroid Core: Shenzhen JLW T14*8*5.5C-JL10; Core, Toroidal, 14.35 mm O.D., 7.5 mm Th, 5.5 mm ID; PI P/N: 32-00286-00. [2] Magnet Wire: #31 AWG, Heavy Nyleze. [3] Center Barrier: FSHP-30, 6.6 mmx 8.1 mm. 8.4 권선지침 Put item [3] in the middle of the core. Use 4 ft of item [2], start at pin 1 wind 55 turns end at pin 4. Do the same for another half of toroid, start at pin 2 and end at pin 3. 8.5 그림 separator Winding direction 1 4 3 2 Figure 11 CMC Build Illustration. Page 27 of 72 Power Integrations
9 트랜스포머디자인스프레드시트 ACDC_TOPSwitchJX_101012; Rev.1.6; Copyright Power Integrations 2010 INPUT INFO OUTPUT UNIT TOP_JX_101012: TOPSwitch-JX Continuous/Discontinuous Flyback Transformer Design Spreadsheet ENTER APPLICATION VARIABLES VACMIN 90 Volts Minimum AC Input Voltage VACMAX 265 Volts Maximum AC Input Voltage fl 50 Hertz AC Mains Frequency VO 12.00 Volts Output Voltage (main) PO_AVG 24.00 Watts Average Output Power PO_PEAK 30.00 Watts Peak Output Power Heatsink Type External External Heatsink Type Enclosure Adapter Open Frame enclosure assumes sufficient airflow, while Adapter means a sealed enclosure. n 0.85 %/100 Efficiency Estimate Z 0.50 Loss allocation factor VB 40 Volts Bias Voltage - Verify that VB is > 8 V at no load and VMAX tc 3.00 ms Bridge Rectifier Conduction Time Estimate CIN 56.0 56 ufarads Input Filter Capacitor ENTER TOPSWITCH-JX VARIABLES TOPSwitch-JX TOP268V Universal / Peak 115 Doubled/230V Chosen Device TOP268V Power Out 70 W / 112 W 105W External Ilimit reduction factor KI 0.37 (KI=1.0 for default ILIMIT, KI <1.0 for lower ILIMIT) ILIMITMIN_EXT 1.119 Amps Use 1% resistor in setting external ILIMIT ILIMITMAX_EXT 1.845 Amps Use 1% resistor in setting external ILIMIT. Includes tolerance over temperature. See Fig 37 of datasheet Frequency (F)=132kHz, (H)=66kHz F fs 132000 Hertz fsmin 119000 Hertz fsmax 145000 Hertz F Select 'H' for Half frequency - 66kHz, or 'F' for Full frequency - 132kHz TOPSwitch-JX Switching Frequency: Choose between 132 khz and 66 khz TOPSwitch-JX Minimum Switching Frequency TOPSwitch-JX Maximum Switching Frequency High Line Operating Mode FF Full Frequency, Jitter enabled VOR 135.00 Volts Reflected Output Voltage VDS 10 Volts TOPSwitch on-state Drain to Source Voltage VD 0.50 Volts Output Winding Diode Forward Voltage Drop VDB 0.70 Volts Bias Winding Diode Forward Voltage Drop KP 0.75 Ripple to Peak Current Ratio (0.3 < KRP < 1.0 : 1.0< KDP<6.0) PROTECTION FEATURES LINE SENSING V pin functionality VUV_STARTUP 101 Volts Minimum DC Bus Voltage at which the power supply will start-up VOV_SHUTDOWN 490 Volts Typical DC Bus Voltage at which Power Integrations, Inc. Page 28 of 72
power supply will shut-down (Max) RLS 4.4 M-ohms Use two standard, 2.2 M-Ohm, 5% resistors in series for line sense functionality. OUTPUT OVERVOLTAGE VZ 47 Volts Zener Diode rated voltage for Output Overvoltage shutdown protection RZ 5.1 k-ohms Output OVP resistor. For latching shutdown use 20 ohm resistor instead OVERLOAD POWER LIMITING X pin functionality Overload Current Ratio at VMAX 1.2 Enter the desired margin to current limit at VMAX. A value of 1.2 indicates that the current limit should be 20% higher than peak primary current at VMAX Overload Current Ratio at VMIN 1.07 Margin to current limit at low line. ILIMIT_EXT_VMIN 1.03 A Peak primary Current at VMIN ILIMIT_EXT_VMAX 1.05 A Peak Primary Current at VMAX RIL 15.49 k-ohms Current limit/power Limiting resistor. RPL N/A M-ohms Resistor not required. Use RIL resistor only ENTER TRANSFORMER CORE/CONSTRUCTION VARIABLES Core Type EFD20 RM7 Core Type Custom Core (Optional) RM7 If Custom core is used - Enter Part number here Bobbin #N/A P/N: #N/A AE 0.4400 0.44 cm^2 Core Effective Cross Sectional Area LE 3.0000 3 cm Core Effective Path Length AL 2700.0 2700 nh/t^2 Ungapped Core Effective Inductance BW 6.9 6.9 mm Bobbin Physical Winding Width M mm Safety Margin Width (Half the Primary to Secondary Creepage Distance) L 4.00 Number of Primary Layers NS 9 9 Number of Secondary Turns DC INPUT VOLTAGE PARAMETERS VMIN 86 Volts Minimum DC Input Voltage VMAX 375 Volts Maximum DC Input Voltage CURRENT WAVEFORM SHAPE PARAMETERS DMAX 0.64 Maximum Duty Cycle (calculated at PO_PEAK) IAVG 0.41 Amps Average Primary Current (calculated at average output power) IP 1.03 Amps Peak Primary Current (calculated at Peak output power) IR 0.77 Amps Primary Ripple Current (calculated at average output power) IRMS 0.54 Amps Primary RMS Current (calculated at average output power) TRANSFORMER PRIMARY DESIGN PARAMETERS LP 572 uhenries Primary Inductance LP Tolerance 3 3 Tolerance of Primary Inductance NP 59 Primary Winding Number of Turns NB 18 Bias Winding Number of Turns ALG 163 nh/t^2 Gapped Core Effective Inductance BM 2253 Gauss Maximum Flux Density at PO, VMIN (BM<3000) Page 29 of 72 Power Integrations
BP 4168 Gauss Peak Flux Density (BP<4200) at ILIMITMAX and LP_MAX. Note: Recommended values for adapters and external power supplies <=3600 Gauss BAC 845 Gauss AC Flux Density for Core Loss Curves (0.5 X Peak to Peak) ur 1465 Relative Permeability of Ungapped Core LG 0.32 mm Gap Length (Lg > 0.1 mm) BWE 27.6 mm Effective Bobbin Width OD 0.47 mm Maximum Primary Wire Diameter including insulation INS 0.06 mm Estimated Total Insulation Thickness (= 2 * film thickness) DIA 0.40 mm Bare conductor diameter AWG 27 AWG Primary Wire Gauge (Rounded to next smaller standard AWG value) CM 203 Cmils Bare conductor effective area in circular mils CMA 374 Cmils/Amp Primary Winding Current Capacity (200 < CMA < 500) Primary Current Density (J) 5.32 Amps/mm^2 Primary Winding Current density (3.8 < J < 9.75) TRANSFORMER SECONDARY DESIGN PARAMETERS (SINGLE OUTPUT EQUIVALENT) Lumped parameters ISP 6.76 Amps Peak Secondary Current ISRMS 2.68 Amps Secondary RMS Current IO_PEAK 1.50 Amps Secondary Peak Output Current IO 1.50 Amps Average Power Supply Output Current IRIPPLE 2.23 Amps Output Capacitor RMS Ripple Current CMS 537 Cmils Secondary Bare Conductor minimum circular mils AWGS 22 AWG Secondary Wire Gauge (Rounded up to next larger standard AWG value) DIAS 0.65 mm Secondary Minimum Bare Conductor Diameter ODS 0.77 mm Secondary Maximum Outside Diameter for Triple Insulated Wire INSS 0.06 mm Maximum Secondary Insulation Wall Thickness VOLTAGE STRESS PARAMETERS VDRAIN 638 Volts Maximum Drain Voltage Estimate (Includes Effect of Leakage Inductance) PIVS 77 Volts Output Rectifier Maximum Peak Inverse Voltage PIVB 153 Volts Bias Rectifier Maximum Peak Inverse Voltage TRANSFORMER SECONDARY DESIGN PARAMETERS (MULTIPLE OUTPUTS) 1st output VO1 20 Volts Output Voltage IO1_AVG 1.50 Amps Average DC Output Current PO1_AVG 30.00 Watts Average Output Power VD1 0.5 Volts Output Diode Forward Voltage Drop NS1 9.00 Output Winding Number of Turns ISRMS1 2.684 Amps Output Winding RMS Current IRIPPLE1 2.23 Amps Output Capacitor RMS Ripple Current Power Integrations, Inc. Page 30 of 72
PIVS1 77 Volts Output Rectifier Maximum Peak Inverse Voltage CMS1 537 Cmils Output Winding Bare Conductor minimum circular mils AWGS1 22 AWG Wire Gauge (Rounded up to next larger standard AWG value) DIAS1 0.65 mm Minimum Bare Conductor Diameter ODS1 0.77 mm Maximum Outside Diameter for Triple Insulated Wire 2nd output VO2 23.00 Volts Output Voltage IO2_AVG 0.01 Amps Average DC Output Current PO2_AVG 0.23 Watts Average Output Power VD2 0.7 Volts Output Diode Forward Voltage Drop NS2 10.40 Output Winding Number of Turns ISRMS2 0.018 Amps Output Winding RMS Current IRIPPLE2 0.01 Amps Output Capacitor RMS Ripple Current PIVS2 89 Volts Output Rectifier Maximum Peak Inverse Voltage CMS2 4 Cmils Output Winding Bare Conductor minimum circular mils AWGS2 44 AWG Wire Gauge (Rounded up to next larger standard AWG value) DIAS2 0.05 mm Minimum Bare Conductor Diameter ODS2 0.66 mm Maximum Outside Diameter for Triple Insulated Wire 3rd output VO3 Volts Output Voltage IO3_AVG Amps Average DC Output Current PO3_AVG 0.00 Watts Average Output Power VD3 0.7 Volts Output Diode Forward Voltage Drop NS3 0.31 Output Winding Number of Turns ISRMS3 0.000 Amps Output Winding RMS Current IRIPPLE3 0.00 Amps Output Capacitor RMS Ripple Current PIVS3 2 Volts Output Rectifier Maximum Peak Inverse Voltage CMS3 0 Cmils Output Winding Bare Conductor minimum circular mils AWGS3 N/A AWG Wire Gauge (Rounded up to next larger standard AWG value) DIAS3 N/A mm Minimum Bare Conductor Diameter ODS3 N/A mm Maximum Outside Diameter for Triple Insulated Wire Page 31 of 72 Power Integrations
10 U1 히트싱크어셈블리 The following mechanical drawings are for the custom mechanical designs used in this power supply. 10.1 히트싱크제작도면 Figure 12 Heat Sink Fabrication Drawing. Power Integrations, Inc. Page 32 of 72
10.2 히트싱크어셈블리도면 Figure 13 Heat Sink Assembly Drawing. Page 33 of 72 Power Integrations
10.3 히트싱크및 U1 어셈블리도면 Figure 14 Heat Sink and U1 Assembly Drawing. Power Integrations, Inc. Page 34 of 72
11 성능데이터 All tests were performed at room temperature with 90 V / 50 Hz, 115 V / 60 Hz, 230 V / 50 Hz, and 265 V / 50 Hz line input voltages and corresponding frequencies unless otherwise noted. The power supply was put in a plastic case and allowed to warm up for 30 minutes at full load. The input was provided via a 1 meter AC cable. The output was measured at the USB connector mounted on the board. 11.1 풀부하효율 1.00 0.95 5 V 9 V 12 V 0.90 Efficiency (%) 0.85 0.80 0.75 0.70 0.65 80 100 120 140 160 180 200 220 240 260 280 Input Voltage (VAC) Figure 15 Efficiency vs. Input Voltage, Room Temperature. Page 35 of 72 Power Integrations
11.2 액티브모드효율 100 90 80 70 Efficiency (%) 60 50 40 30 20 10 0 90 V 115 V 230 V 265 V 0 10 20 30 40 50 60 70 80 90 100 Load (%) Figure 16 Efficiency vs. Load 5 V. Power Integrations, Inc. Page 36 of 72
100 90 80 70 Efficiency (%) 60 50 40 30 20 10 0 90 V 115 V 230 V 265 V 0 10 20 30 40 50 60 70 80 90 100 Load (%) Figure 17 Efficienc vs. Load 9 V. Page 37 of 72 Power Integrations
100 90 80 70 Efficiency (%) 60 50 40 30 20 10 0 90 V 115 V 230 V 265 V 0 10 20 30 40 50 60 70 80 90 100 Load (%) Figure 18 Efficiency vs. Load 12 V. Percent of Full Load 12 V Efficiency (%) (%) 115 VAC 230 VAC 100 85.21 84.96 90 85.39 85.28 80 86.30 85.44 75 85.75 85.85 70 86.37 85.43 60 86.09 85.73 50 86.27 85.49 40 86.05 85.27 30 85.95 84.90 25 85.73 84.54 20 85.31 83.76 10 82.00 78.38 Average 85.7 85.2 US EISA (2007) Requirement 79 ENERGY STAR EPS v2, EC CoC v4, EUP Tier 2 82 Power Integrations, Inc. Page 38 of 72
11.3 에너지효율기준 The external power supply requirements below all require meeting active mode efficiency and no-load input power limits. Minimum active mode efficiency is defined as the average efficiency of 25, 50, 75 and 100% of output current (based on the nameplate output current rating). For adapters that are single input voltage only then the measurement is made at the rated single nominal input voltage (115 VAC or 230 VAC), for universal input adapters the measurement is made at both nominal input voltages (115 VAC and 230 VAC). To meet the standard the measured average efficiency (or efficiencies for universal input supplies) must be greater than or equal to the efficiency specified by the standard. The test method can be found here: http://www.energystar.gov/ia/partners/prod_development/downloads/power_supplies/ep SupplyEffic_TestMethod_0804.pdf For the latest up to date information please visit the PI Green Room: http:///greenroom/regulations.htm Page 39 of 72 Power Integrations
11.3.1 2007 미국에너지독립및안보법 This legislation mandates all single output single output adapters, including those provided with products, manufactured on or after July 1 st, 2008 must meet minimum active mode efficiency and no load input power limits. Active Mode Efficiency Standard Models Nameplate Output (P O ) Minimum Efficiency in Active Mode of Operation < 1 W 0.5 P O 1 W to 51 W 0.09 ln (P O ) + 0.5 > 51 W 0.85 Ln = natural logarithm No-load Energy Consumption Nameplate Output (P O ) All Maximum Power for No-load AC-DC EPS 0.5 W This requirement supersedes the legislation from individual US States (for example CEC in California). 11.3.2 ENERGY STAR EPS 버전 2.0 This specification takes effect on November 1 st, 2008. Active Mode Efficiency Standard Models Nameplate Output (P O ) Minimum Efficiency in Active Mode of Operation 1 W 0.48 P O + 0.14 > 1 W to 49 W 0.0626 ln (P O ) + 0.622 > 49 W 0.87 ln = natural logarithm Active Mode Efficiency Low Voltage Models (V O <6 V and I O 550 ma) Nameplate Output (P O ) Minimum Efficiency in Active Mode of Operation 1 W 0.497 P O + 0.067 > 1 W to 49 W 0.075 ln (P O ) + 0.561 > 49 W 0.86 ln = natural logarithm No-load Energy Consumption (both models) Nameplate Output (P O ) Maximum Power for No-load AC-DC EPS 0 to < 50 W 0.3 W 50 W to 250 W 0.5 W Power Integrations, Inc. Page 40 of 72
11.4 무부하시의입력전력 Test results shows that the toggle board affects the no load input power, and thus on no load data for 5 V without toggle board is shown in this report. 180 160 No-load Input Power (mw) 140 120 100 80 60 40 80 100 120 140 160 180 200 220 240 260 280 Input Voltage (VAC) Figure 19 No-Load Input Power at 5 V and Without Toggle Board. Page 41 of 72 Power Integrations
11.5 CV/CC 6.0 5.0 90 V 115 V 230 V 265 V Output Voltage (V) 4.0 3.0 2.0 1.0 0.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 Load (A) Figure 20 5 V CV/CC, Room Temperature. Power Integrations, Inc. Page 42 of 72
10.0 8.0 90 V 115 V 230 V 265 V Output Voltage (V) 6.0 4.0 2.0 0.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 Load (A) Figure 21 9 V CV/CC, Room Temperature. Page 43 of 72 Power Integrations
14.0 12.0 90 V 115 V 230 V 265 V 10.0 Output Votlage (V) 8.0 6.0 4.0 2.0 0.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 Load (A) Figure 22 12 V CV/CC, Room Temperature. Power Integrations, Inc. Page 44 of 72
12 써멀성능 At room ambient, thermal performance was tested with12 V, 2 A load and 12 V, 1.5 A load. Figure 23 Thermal at 90 VAC 12 V, 2 A. Figure 24 Thermal at 265 VAC, 2 A. Page 45 of 72 Power Integrations
Figure 25 Thermal at 90 VAC 12 V, 1.5 A. Figure 26 Thermal at 265 VAC, 1.5 A. Power Integrations, Inc. Page 46 of 72
13 파형 13.1 드레인전압및전류, 정상동작 Figure 27 90 VAC, 12 V, 2 A. Upper: V DRAIN, 100 V / div. Lower: I DRAIN, 0.5 A, 2 s / div. 13.2 출력전압스타트업프로파일 Figure 28 265 VAC, 12 V, 2 A. Upper: V DRAIN, 200 V / div. Lower: I DRAIN, 0.5 A, 2 s / div. 13.2.1 5V, 2A CR 부하스타트업 Figure 29 Start-up Profile, 90 VAC. 5 V, 2 A CR Load. Upper: V OUT, 1 V / div. Lower: I OUT, 0.5 A, 5 ms / div. Figure 30 Start-up Profile, 265 VAC. 5 V, 2 A CR Load. Upper: V OUT, 1 V / div. Lower: I OUT, 0.5 A, 5 ms / div. Page 47 of 72 Power Integrations
13.2.2 5V, 0.2 A CR 부하스타트업 Figure 31 Start-up Profile, 90 VAC. 5 V, 0.2 A CR Load. Upper: V OUT, 1 V / div. Lower: I OUT, 0.5 A, 5 ms / div. Figure 32 Start-up Profile, 265 VAC. 5 V, 0.2 A CR Load. Upper: V OUT, 1 V / div. Lower: I OUT, 0.5 A, 5 ms / div. Power Integrations, Inc. Page 48 of 72
13.3 드레인전압및전류스타트업프로파일 Figure 33 90 VAC, 5 V, 2 A. Upper: V DRAIN, 100 V / div. Lower: I DRAIN, 0.5 A, 5 ms / div. Figure 34 265 VAC, 5 V, 2 A. Upper: V DRAIN, 200 V / div. Lower: I DRAIN, 0.5 A, 5 ms / div. 13.4 출력다이오드피크역전압 Figure 35 265 VAC, 12 V Output, 2 A Load. V DIODE, 20 V, 2 s / div. Page 49 of 72 Power Integrations
13.5 과도부하응답 In the figures shown below, signal averaging was used to better enable viewing the load transient response. The oscilloscope was triggered using the load current step as a trigger source. Since the output switching and line frequency occur essentially at random with respect to the load transient, contributions to the output ripple from these sources will average out, leaving the contribution only from the load step response. Note the DC shifts are due to the output cable resistance. 13.5.1 12V 출력, 0.5A - 1.75A - 0.5A 부하단계 Figure 36 Transient Response, 90 VAC, 318 mv PK-PK. Upper: V RIPPLE, 100 mv / div. Lower: I LOAD, 1 A, 10 ms / div. Figure 37 Transient Response, 115 VAC, 275 mv PK-PK. Upper: V RIPPLE, 100 mv / div. Lower: I LOAD, 1 A, 10 ms / div. Figure 38 Transient Response, 230 VAC, 160 mv PK-PK. Upper: V OUT, 100 mv / div. Lower: I LOAD, 1 A, 5 ms / div. Figure 39 Transient Response, 265 VAC, 148 mv PK-PK. Upper: V OUT, 100 mv / div. Lower: I LOAD, 1 A, 5 ms / div. Power Integrations, Inc. Page 50 of 72
13.5.2 5V 출력, 0.5A - 1.75A - 0.5A 부하단계 Figure 40 Transient Response, 90 VAC, 172 mv PK-PK. Upper: V RIPPLE, 100 mv / div. Lower: I LOAD, 1 A, 10 ms / div. Figure 41 Transient Response, 115 VAC, 154 mv PK-PK. Upper: V RIPPLE, 100 mv / div. Lower: I LOAD, 1 A, 10 ms / div. Figure 42 Transient Response, 230 VAC, 153 mv PK-PK. Upper: V OUT,100 mv / div. Lower: I LOAD, 1 A, 10 ms / div. Figure 43 Transient Response, 265 VAC, 147 mv PK-PK. Upper: V OUT, 100 mv / div. Lower: I LOAD, 1 A, 5 ms / div. Page 51 of 72 Power Integrations
13.6 출력리플측정 13.6.1 리플측정기술 For DC output ripple measurements, a modified oscilloscope test probe must be utilized in order to reduce spurious signals due to pick up. Details of the probe modification are provided in the figures below. The 4987BA probe adapter is affixed with two capacitors tied in parallel across the probe tip. The capacitors include one (1) 0.1 F / 50 V ceramic type and one (1) 10.0 F / 50 V aluminum electrolytic. The aluminum electrolytic type capacitor is polarized, so proper polarity across DC outputs must be maintained (see below). Probe Ground Probe Tip Figure 44 Oscilloscope Probe Prepared for Ripple Measurement. (End Cap and Ground Lead Removed) Figure 45 Oscilloscope Probe with Probe Master (www.probemaster.com) 4987A BNC Adapter. (Modified with wires for ripple measurement, and two parallel decoupling capacitors added) Power Integrations, Inc. Page 52 of 72
13.6.2 PCB 의측정결과 Figure 46 Ripple, 90 VAC, 12 V, 2 A. 91.5 mv PK-PK. 2 ms, 20 mv / div. Figure 47 Ripple, 115 VAC, 12 V, 2 A. 73 mv PK-PK. 2 ms, 20 mv / div. Figure 48 Ripple, 230 VAC, 12 V, 2 A. 71 mv PK-PK. 2 ms, 20 mv / div. Figure 49 Ripple, 265 VAC, 12 V, 2 A. 73 mv PK-PK. 2 ms, 20 mv / div. Page 53 of 72 Power Integrations
Figure 50 Ripple, 90 VAC, 5 V, 2 A. 65 mv PK-PK. 2 ms, 20 mv / div. Figure 51 Ripple, 115 VAC, 5 V, 2 A. 62.5 mv PK-PK. 2 ms, 50 mv / div. Figure 52 Ripple, 230 VAC, 5 V, 2 A. 73 mv PK-PK. 2 ms, 50 mv / div. Figure 53 Ripple, 265 VAC, 5 V, 2 A. 97 mv PK-PK. 2 ms, 50 mv / div. Power Integrations, Inc. Page 54 of 72
13.7 출력전압전환 13.7.1 풀부하 2A 에서출력증가 Figure 54 V OUT from 5 V to 9 V, 90 VAC 2 A. Upper: V OUT, 2 V / div. Lower: I OUT, 1 A, 10 ms / div. Figure 55 V OUT from 5 V to 12 V, 90 VAC 2 A. Upper: V OUT, 2 V / div. Lower: I OUT, 1 A, 10 ms / div. Figure 56 V OUT from 5 V to 9 V, 265 VAC 2 A. Upper: V OUT, 2 V / div. Lower: I OUT, 1 A, 10 ms / div. Figure 57 V OUT from 5 V to 12 V, 265 VAC 2 A. Upper: V OUT, 2 V / div. Lower: I OUT, 1 A, 10 ms / div. Page 55 of 72 Power Integrations
13.7.2 하프부하 1A 에서출력증가 Figure 58 V OUT from 5 V to 9 V, 90 VAC 1 A. Upper: V OUT, 2 V / div. Lower: I OUT, 1 A, 10 ms / div. Figure 59 V OUT from 5 V to 12 V, 90 VAC 1 A. Upper: V OUT, 2 V / div. Lower: I OUT, 1 A, 10 ms / div. Figure 60 V OUT from 5 V to 9 V, 265 VAC 1 A. Upper: V OUT, 2 V / div. Lower: I OUT, 1 A, 10 ms / div. Figure 61 V OUT from 5 V to 12 V, 265 VAC 1 A. Upper: V OUT, 2 V / div. Lower: I OUT, 1 A, 10 ms / div. Power Integrations, Inc. Page 56 of 72
13.7.3 경부하 0.15A 에서출력증가 Figure 62 V OUT from 5 V to 9 V, 90 VAC 0.15 A. Upper: V OUT, 2 V / div. Lower: I OUT, 1 A, 10 ms / div. Figure 63 V OUT from 5 V to 12 V, 90 VAC 0.15 A. Upper: V OUT, 2 V / div. Lower: I OUT, 1 A, 10 ms / div. Figure 64 V OUT from 5 V to 9 V, 265 VAC 0.15 A. Upper: V OUT, 2 V / div. Lower: I OUT, 1 A, 10 ms / div. Figure 65 V OUT from 5 V to 12 V, 265 VAC 0.15 A. Upper: V OUT, 2 V / div. Lower: I OUT, 1 A, 10 ms / div. Page 57 of 72 Power Integrations
13.7.4 풀부하 2A 에서전압감소 Figure 66 V OUT from 9 V to 5 V, 90 VAC 2 A. Upper: V OUT, 2 V / div. Lower: I OUT, 1 A, 10 ms / div. Figure 67 V OUT from 12 V to 5 V, 90 VAC 2 A. Upper: V OUT, 2 V / div. Lower: I OUT, 1 A, 10 ms / div. Figure 68 V OUT from 9 V to 5 V, 265 VAC 2 A. Upper: V OUT, 2 V / div. Lower: I OUT, 1 A, 10 ms / div. Figure 69 V OUT from 12 V to 5 V, 265 VAC 2 A. Upper: V OUT, 2 V / div. Lower: I OUT, 1 A, 10 ms / div. Power Integrations, Inc. Page 58 of 72
13.7.5 하프부하 1A 에서전압감소 Figure 70 V OUT from 9 V to 5 V, 90 VAC 1 A. Upper: Vo, 2 V / div. Lower: I OUT, 1 A, 10 ms / div. Figure 71 V OUT from 12 V to 5 V, 90 VAC 1A. Upper: V OUT, 2 V / div. Lower: I OUT, 1 A, 10 ms / div. Figure 72 V OUT from 9 V to 5 V, 265 VAC 1 A. Upper: V OUT, 2 V / div. Lower: I OUT, 1 A, 10 ms / div. Figure 73 V OUT from 12 V to 5 V, 265 VAC 1 A. Upper: V OUT, 2 V / div. Lower: I OUT, 1 A, 10 ms / div. Page 59 of 72 Power Integrations
13.7.6 경부하 0.15A 에서전압감소 Figure 74 V OUT from 9 V to 5 V, 90 VAC 0.15 A. Upper: V OUT, 2 V / div. Lower: I OUT, 1 A, 10 ms / div. Figure 75 V OUT from 12 V to 5 V, 90 VAC 0.15 A. Upper: V OUT, 2 V / div. Lower: I OUT, 1 A, 10 ms / div. Figure 76 V OUT from 9 V to 5 V, 265 VAC 0.15 A. Upper: V OUT, 2 V / div. Lower: I OUT, 1 A, 10 ms / div. Figure 77 V OUT from 12 V to 5 V, 265 VAC 0.15 A. Upper: V OUT, 2V / div. Lower: I OUT, 1 A, 10 ms / div. Power Integrations, Inc. Page 60 of 72
Page 61 of 72 Power Integrations
13.8 USB 언플러그파형 13.8.1 9V USB 언플러그파형 Figure 78 9 V, 115 VAC USB Unplugged. V OUT, 2 V, 20 ms / div. Figure 79 9 V, 230 VAC USB Unplugged. V OUT, 2 V, 20 ms / div. 13.8.2 12V USB 언플러그파형 Figure 80 12 V, 115 VAC USB Unplugged. V OUT, 2 V, 20 ms / div. Figure 81 12 V, 230 VAC USB Unplugged. V OUT, 2 V, 20 ms / div. Power Integrations, Inc. Page 62 of 72
13.9 컨트롤루프측정 13.9.1 12V 루프테스트 Half Load Full Load Input (VAC) Cross Over Frequency (khz) Phase Margin (º) Cross Over Frequency (khz) Phase Margin (º) 115 3.4 83 2.95 80 230 2.5 82 2.2 78 13.9.2 5V 루프테스트 Half Load Full Load Input (VAC) Cross Over Frequency (khz) Phase Margin (º) Cross Over Frequency (khz) Phase Margin (º) 115 4 86 3.8 75 230 7.5 85 8 62 Page 63 of 72 Power Integrations
14 전도성 EMI Equipment used: Rohde and Schwarz ESPI3 (PN: m1142.8007.03 / EMI Test Receiver 9 khz to 3 GHz). Figure 82 Conducted EMI, 2 A Resistor Load, 115 VAC, 60 Hz, 5 V Output. Output Connected to PE. Power Integrations, Inc. Page 64 of 72
Figure 83 Conducted EMI, 2A Resistor Load, 230 VAC, 60 Hz, 5 V Output. Output Connected to PE. Page 65 of 72 Power Integrations
Figure 84 Conducted EMI, 2 A Resistor Load, 115 VAC, 60 Hz, 12 V output. Output Connected to PE. Figure 85 Conducted EMI, 2 A Resistor Load, 230 VAC, 60 Hz, 12 V Output. Output Connected to PE. Power Integrations, Inc. Page 66 of 72
15 부록 A - 특수조립지침 15.1 재료 Item Description [1] RTV 670810, GE, 66-00038-00. [2] RTV Application Gun. [3] Teflon Tubing, 66-00132-00. [4] Double Sided Thermal Tape, 60-00024-00. 15.2 트랜스포머설치 (T1) Install and solder T1 primary side pins. FL1, FL3 Locate the FL1 tagged secondary lead and insert into the designated FL1 board reference and solder. Locate the FL3 tagged bias lead and insert into the designated FL3 board reference and solder. FL2 Locate the FL2 lead and insert into the FL2 board reference. Apply solder. Page 67 of 72 Power Integrations
15.3 히트싱크설치 Cut Thermal Tape PI # 60-00042-00 Cut a piece of double sided thermal tape to.50 x.50. Apply Thermal Tape Apply the termal tape to the bottom side of the heat sink. Remove Tape Backing Remove the backing from thermal tape. Install Heat Sink Install the heatsink and apply enough pressure to make sure that it sits securely on top of the device. Solder both heat sink pins. Power Integrations, Inc. Page 68 of 72
15.4 커패시터설치 (C2) Cut Teflon Tubing Cut two lengths of teflon tubing to.350 and slide over each of the leads of C2. Install C2 Locate the C2 board reference and solder C2 in between the fins of the heat sink. Apply RTV PI # 66-00038-00 Apply RTV to C2 making sure that there is a slight gap between the body of the capacitor and the heat sink. Check Spacing Check the gap between the capacitor and the heat sink. The capacitor should not have any contact with the heat sink. Page 69 of 72 Power Integrations
15.5 RTV 적용 (C1 및 L3) Apply RTV PI # 66-00038-00 Apply RTV to secure L3 to C1. Check Alignment Make sure that L3 is straight and does not lean outside the boundary of the circuit board. Power Integrations, Inc. Page 70 of 72
16 개정내역 Date Author Revision Description & Changes Reviewed 08-Oct-13 PL 1.0 Initial release Apps & Mktg 31-Mar-14 KM 1.1 Added transformer supplier KM 1.2 Corrected schematic Page 71 of 72 Power Integrations
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