컴퓨터구성 Lecture #2 Chapter : Digital Logic Circuits Spring, 203 컴퓨터구성 : Spring, 203: No. -
Digital Computer Definition Digital vs. nalog Digital computer is a digital system that performs various computational tasks Digital: a limited number of discrete values nalog: an uncountable number of continuous values Digits and Bit Digits: discrete elements Bits: a binary digit Most computers use bits to represent information So, we need to understand the binary system Why bits? Systems function more reliably if only two states are used 컴퓨터구성 : Spring, 203: No. - 2
Computer System Definition Hardware computer system is composed of hardware and software Consists of electronic components & electromechanical devices that comprise the physical entity of the device Software Consists of programs composed of a sequence of instructions System Software Collection of programs to make more effective use of computers Eample: Operating systems, Compilers 컴퓨터구성 : Spring, 203: No. - 3
Computer Organization Definition Computer organization is concerned with the way the hardware components operate and the way they are connected together to form a system Transparent to computer users Technologies TTL, ECL (in Chap. 2) Device Implementations Gates (ND, OR, ) & Flip-flops (SR, D, JK, T) Control Signals Hardwired, Micro-programmed 컴퓨터구성 : Spring, 203: No. - 4
Computer rchitecture Definition Computer architecture is concerned with the structure and the behavior of the computer as seen by the user Instruction set operation encoding, memory addressing techniques Data representations signed magnitude, floating-point ddressing direct, indirect, relative I/O mechanisms memory mapped, I/O mapped 컴퓨터구성 : Spring, 203: No. - 5
Computer Hardware Basic 5 Components Random-access Memory (RM) Central processing Unit Input devices Input-Output processor Output devices 컴퓨터구성 : Spring, 203: No. - 6
Boolean lgebra Preamble Boolean algebra is an algebra that deals with binary variables and logic operations Following three representations mean the same function Boolean Function lgebraic epression with binary variables, logic operation symbols, parenthesis & equal sign Truth Table relationship between the function and its variables Logic Diagram Epression of Boolean function using logic gates 컴퓨터구성 : Spring, 203: No. - 7
Logic Gates Binary information is represented in digital computers by physical quantities called electrical signals Gates are block hardware that process input signals and produce output signals of according to their functions ny gates can be replaced by a combination of NND or NOR Q: Make ND and OR circuits by using NND or NOR gates 컴퓨터구성 : Spring, 203: No. - 8
Logic Gates Table 컴퓨터구성 : Spring, 203: No. - 9
CMOS Gates Introduction Switch Transistor Logic Symbol B B B N - type C + ns C Gate Drain Source C V C - V BC + B B B P - type C - ps C Gate Source Drain C 컴퓨터구성 : Spring, 203: No. - 0
CMOS Gates NOT V DD V DD B B C ps C z z B B v in C ns v out v in C v out 컴퓨터구성 : Spring, 203: No. -
CMOS Gates NND / NOR V DD V DD z y z y 컴퓨터구성 : Spring, 203: No. - 2
CMOS Gates ND / OR V DD V DD z y z y 컴퓨터구성 : Spring, 203: No. - 3
Boolean lgebra Representation Methods Eample: Boolean Function F = + y z Truth Table y z F 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Logic Diagram y z F 컴퓨터구성 : Spring, 203: No. - 4
Boolean lgebra Simplification Why? To minimize the number of logic gates to reduce the propagation delay and the cost while performing the same function How? Using the basic identities of Boolean algebra Using the map simplification It is more difficult to use the algebra but when the involved variables are more than 4, above two methods have the same degree of difficulty 컴퓨터구성 : Spring, 203: No. - 5
Boolean lgebra Boolean Identites Identities of Boolean lgebra. + 0 = 3. + = 5. + = 7. + = 9. + y = y +. + (y + z) = ( + y) + z 3. (y + z) = y + z 5. ( + y) = + y 2. 0 = 0 4. = 6. = 8. = 0. y = y 2. (yz) = (y)z 4. + yz = ( + y)( + z) 6. (y) = + y 7. ( ) = Q: Prove Eq. 4 컴퓨터구성 : Spring, 203: No. - 6
Boolean lgebra Simplification using Boolean Identites E: Boolean Epression Simplification using Boolean lgebra Given: F = BC + BC + C Sol: F = BC + BC + C = B(C+C ) + C = B + C B C B F F C Q: What if the given epression is too comple?? 컴퓨터구성 : Spring, 203: No. - 7
Map Simplification Introduction & Minterm Pictorial method to simplify Boolean epressions Simple and straightforward Using a Karnaugh-Map Minterm: Each combination of variables in a truth table Eample: Minterm Epression F(, y, z) = (, 4, 5, 6) = + 4 + 5 + 6 = 00 + 00 + 0 + 0 = y z + y z + y z + yz Decimal Equivalents of Minterms y z F 0 0 0 0 0 0 0 2 0 0 0 3 0 0 4 0 0 5 0 6 0 7 8 minterms This is said to be in the form of sum-of-products 컴퓨터구성 : Spring, 203: No. - 8
Map Simplification K-map Format of the K-Map Pay attention to the ordering djacent squares iff two squares differ only one bit Squares are marked with 0 or according to minterm values Squares with 0 my be left blank for visibility 0 B BC 00 0 0 0 0 0 0 3 2 CD B 00 0 00 0 0 4 5 0 3 2 7 6 2 3 4 5 7 6 2 3 5 4 0 8 9 0 컴퓨터구성 : Spring, 203: No. - 9
Map Simplification Square Grouping Group adjacent squares that have so that... Grouped squares form a rectangle or square The number of squares in the group is power of 2 (2, 4, 8, 6,..) Make the group size as large as possible Eample: F(,B,C) = (, 3) F = B C + BC = C(B + B) = C BC 0 00 0 0 Find variables that do not change in the group C 컴퓨터구성 : Spring, 203: No. - 20
Map Simplification Square Grouping Eamples: F(,B,C) = (3,4,6,7) F(,B,C) = (0,2,4,5,6) F(,B,C,D) = (0,,2,6,8,9,0) BC 00 0 0 BC 00 0 0 B CD 00 0 0 0 0 00 0 0 F = BC + C F = C + B F = B D + B C + CD 컴퓨터구성 : Spring, 203: No. - 2
Map Simplification Procedure Summary Simplification Procedure Plot a map based on the number of variables Insert s or 0 s in squares based on minterm values Group adjacent squares whose minterms are Represent each grouped square with unchanging variables in the form of sum-of-products 컴퓨터구성 : Spring, 203: No. - 22
Map Simplification Product-of-Sums Form Underlying Principle: (F ) = F Find F by squaring 0 s in K-map instead of s Find F (F ) F(,B,C,D) = (0,,2,5,8,9,0) CD B 00 00 0 0 0 0 0 0 0 0 0 0 0 0 0 F = B + CD + BD F = ( +B )(C +D )(B +D) 컴퓨터구성 : Spring, 203: No. - 23
Map Simplification Don t-care Conditions Don t-care Conditions: the minterms that may produce either 0 or for the function are marked with an X in the map can be used to provide further simplification F(,B,C) = (0, 2, 6) d(,b,c) = (, 3, 5) BC 0 00 0 0 F = + BC F(,B,C) = (0,,2,3,6) 컴퓨터구성 : Spring, 203: No. - 24
Combinational Circuits Introduction connected arrangement of logic gates with a set of inputs and outputs n input variables Combinational Circuit m output variables Circuit Design Procedure Problem statement ssign letter symbols to I/O Build a truth table Simplification for each output Logic Diagram 컴퓨터구성 : Spring, 203: No. - 25
Combinational Circuits Half dder combinational circuit that performs the arithmetic addition of two bits Truth Table y C S Boolean Function S = y + y = y C = y 0 0 0 0 0 0 Logic Diagram 0 0 0 y S C 컴퓨터구성 : Spring, 203: No. - 26
Combinational Circuits Full dder combinational circuit that performs the arithmetic addition of three bits 0 0 0 0 Truth Table y z C S 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Boolean Function S = y z C = y + ( y + y )z y z = y + ( y)z Block Diagram F S C 컴퓨터구성 : Spring, 203: No. - 27
Flip-Flops Introduction Flip-Flop binary cell capable of storing one bit of information or 2 inputs 2 outputs: one for normal value; the other for compliment Maintains its state until directed by a clock pulse usually, by positive (0 ) clock edge state changes only upon the clock outputs are available always D Q clock Q No state changes Positive clock transition 컴퓨터구성 : Spring, 203: No. - 28
Flip-Flops SR Flip-flop Q(t+) = S(t) + R (t)q(t) S Q R Q S 0 0 R Q(t+) 0 Q(t) No change 0 Clear to 0 0 Set to? Indeterminate 컴퓨터구성 : Spring, 203: No. - 29
Flip-Flops D Flip-flop Q(t+) = D D Q D Q(t+) Q 0 0 Clear to 0 Set to Q: Can you make a D f/f using an SR f/f? D S Q R Q 컴퓨터구성 : Spring, 203: No. - 30
Flip-Flops JK Flip-flop Q(t+) = S(t)R (t) + S(t)R(t)Q (t) + S (t)r (t)q(t) J K Q(t+) J Q K Q 0 0 0 Q(t) No change 0 Clear to 0 0 Set to Q (t) Compliment Q: Can you make a JK f/f using an SR f/f? J S Q K R Q 컴퓨터구성 : Spring, 203: No. - 3
Flip-Flops T Flip-flop Q(t+) = Q(t) T T Q T Q(t+) Q 0 Q(t) Q (t) No change Compliment Q: Can you make a T f/f using an SR f/f? T S Q R Q 컴퓨터구성 : Spring, 203: No. - 32
Flip-Flops Edge-Triggered Flip-flop Revisit Synchronize the state change during a clock pulse State transitions occur when pulse level eceeds a predetermined threshold level Positive-edge or negative-edge transition depends on whether transition occurs on rising edge or falling edge of clock D Q clock Q No state changes Positive clock transition 컴퓨터구성 : Spring, 203: No. - 33
Flip-Flops Ecitation Table When designing a sequential circuit We have desired state transitions Need to define f/f s input Ecitation Table Lists required input combination for a given change of states You should fully understand the tables or 컴퓨터구성 : Spring, 203: No. - 34
Flip-Flops Ecitation Table SR Flip-Flop Q(t) Q(t+) S R 0 0 0 0 0 0 0 0 D Flip-Flop Q(t) Q(t+) D 0 0 0 0 0 0 JK Flip-Flop Q(t) Q(t+) J K 0 0 0 0 0 0 T Flip-Flop Q(t) Q(t+) D 0 0 0 0 0 0 컴퓨터구성 : Spring, 203: No. - 35
Sequential Circuits Introduction connection of flip-flops and logic gates with a set of inputs and outputs inputs Combinational Circuit clock Flip-Flops outputs 컴퓨터구성 : Spring, 203: No. - 36
Sequential Circuits State Transition Diagram Graphic presentation of states & their changes on certain inputs Eample: /0 D State named as 0/ /0 / B Change of states B 0/0 C 0/ Change of states on an input 0 & output is 컴퓨터구성 : Spring, 203: No. - 37
Sequential Circuits Design Procedure Given a problem statement Circuit Design Procedure Draw a State Transition Diagram ssign state Variables to the states Determine the types of flip-flops to use Translate state diagram to State Table with current states, inputs, outputs, net states Etend state table to Ecitation Table including inputs to flip-flops Determine Boolean functions for the outputs and for the inputs of flip-flops Draw a Logic Diagram 컴퓨터구성 : Spring, 203: No. - 38
Sequential Circuits Design Eample Problem statement: Design a clocked sequential circuit that goes through a repeated states K, L, M, and N when eternal input is while the state of the circuit remains unchanged when = 0 Procedure State Diagram Variables Flip-flop types State Table Ecitation Table Boolean functions Logic Diagram Step : State Transition Diagram 0 0 K N L M 0 0 컴퓨터구성 : Spring, 203: No. - 39
Sequential Circuits Design Eample Procedure State Diagram Variables Flip-flop types State Table Ecitation Table Boolean functions Logic Diagram Step 2: State Variables & Values 4 states 2 bits 2 variables & B for each bit B = 00 for state K, B = 0 for state L, etc. Step 3: Flip-flop types Need: Complimenting JK & T flip-flops No change SR & JK flip-flops We take JK flip-flops 컴퓨터구성 : Spring, 203: No. - 40
Sequential Circuits Design Eample Procedure State Diagram Variables Flip-flop types State Table Ecitation Table Boolean functions Logic Diagram Crt State State Table Ecitation Table input B B 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Net State Flip-flop Inputs J K J B K B 0 0 0 0 0 0 0 0 0 0 컴퓨터구성 : Spring, 203: No. - 4
Sequential Circuits Design Eample Procedure State Diagram Variables Flip-flop types B 0 00 0 0 B 0 00 0 0 State Table Ecitation Table Boolean function Logic Diagram J = B K = B B 00 0 0 B 00 0 0 0 0 J B = K B = 컴퓨터구성 : Spring, 203: No. - 42
Sequential Circuits Design Eample Procedure State Diagram Variables J Q Flip-flop types State Table Ecitation Table K Boolean function Logic Diagram J Q B J = B K = B J B = K B = K clock 컴퓨터구성 : Spring, 203: No. - 43
Homework #: Problems in Tetbook: -9, -3, -9, -20, -2 Vending Machine Design: Input: 50, 00 Coins Output: cup of coffee when the sum becomes 50 or more Conditions: No changes are paid. Once the sum reaches at over 50, the system restarts from the beginning. Your Job: Draw a logic diagram and show all your works. Due: Net Wednesday (203. 3. 25. Monday) before class begins 컴퓨터구성 : Spring, 203: No. - 44