THE JOURNAL OF KOREAN INSTITUTE OF ELECTROMAGNETIC ENGINEERING AND SCIENCE. 2013 Nov.; 24(11), 1081 1090. http://dx.doi.org/10.5515/kjkiees.2013.24.11.1081 ISSN 1226-3133 (Print) ISSN 2288-226X (Online) Memory Effect C- GaAs C-Band Internally Matched GaAs Power Amplifier with Minimized Memory Effect 최운성 이경학 어윤성 Woon-Sung Choi* Kyung-Hak Lee** Yun-Seong Eo*, ** 요약 C- 10 W. GaAs phemt bare-chip.. EM simulation. 2-tone memory effect IMD3 memory effect., 7.1 7.8 GHz P 1dB 39.8 40.4 dbm, 9.7 10.4 db, 33.4 38.0 %, memory effect IMD3(Upper) IMD3(Lower) 0.76 db. Abstract In this paper, a C-band 10 W power amplifier with internally matched input and output matching circuit is designed and fabricated. The used power transistor for the power amplifier is GaAs phemt bare-chip. The wire bonding analysis considering the size of the capacitor and the position of transistor pad improves the accurate design. The matching circuit design with the package effect using EM simulation is performed. To reduce the unsymmetry of IMD3 in 2-tone measurement due to the memory effect, the bias circuit minimizing the memory effect is proposed and employed. The measured P 1dB, power gain, and power added efficiency are 39.8 40.4 dbm, 9.7 10.4 db, and 33.4 38.0 %, respectively. Adopting the proposed bias circuit, the difference between the upper and lower IMD3 is less than 0.76 db. Key words : IMFET, Memory Effect, C-Band Power Amplifier, GaAs phemt. 서론, W,. IMFET(Internally Matched FET). 50 ohm [1]. GaAs HEMT, HFET. GaN HEMT [2],[3], * (Department of Electronic Engineering, KwangWoon University) ** (Silicon R&D) Manuscript received September 2, 2013 ; Revised October 4, 2013 ; Accepted October 7, 2013. (ID No. 20130902-07S) Corresponding Author : Yun-Seong Eo (e-mail : yseo71@kw.ac.kr) c Copyright The Korean Institute of Electromagnetic Engineering and Science. All Rights Reserved. 1081
THE JOURNAL OF KOREAN INSTITUTE OF ELECTROMAGNETIC ENGINEERING AND SCIENCE. vol. 24, no. 11, Nov. 2013. Si LDMOS. bare-chip,., (Al 2 O 3 ),,.,... C- (7.1 7.8 GHz) 10 W IMFET. GaAs phemt, 2-tone memory effect IMD3. memory effect IMD- 3.. Internally Matched FET 설계 2-1 Internally Matched FET 패키지설계 1 IMFET. Barechip., PCB. PCB,. (Al 2 O 3 ). 그림 1. IMFET Fig. 1. IMFET circuit..,, eutectic bonding. Eutectic bonding, AuSn(80: 20). 2-2 전력증폭기소자 GaAs phemt bare-chip. Triquint TGF2021-12. 1 TGF2021-12 10 GHz, 10 V. 12.5 V, 10 V. P 1dB 1 1.5 db. P 1dB 10 W. 표 1. TGF2021-12 Table 1. Performance of TGF2021-12. Frequency Psat 10 GHz 41.5 dbm PAE 49 % Power gain Drain bias voltage 11 db 10 V Load reflection coefficient 0.947 177.7 Chip dimension 0.57 2.93 0.1 mm 3 1082
Memory Effect C- GaAs 2-3 EM Simulation 을이용한와이어본딩해석 [4]...,. Ansys HFSS. 2(a) SLC (Single Layer Capacitor). A, B SLC. 2(b) SLC 표 2. Table 2. Wire bonding inductance of wire structure. (nh) 2(a) 0.11 2(b) 0.08 2(c) 0.09. 2(c) SLC. SLC 0.32 mm, SLC 0.5 mm, 0.2 mm, 0.05 mm. 2 7.5 GHz 2 EM simulation pi- (1). (1) (a) (b) SLC. SLC. 2-4 입 출력정합회로설계 2-4-1 입력정합회로설계 (c) 그림 2. (a) SLC, (b) (c), Fig. 2. (a) Wire bonding with considered size of SLC and transistor, (b) Wire bonding with considered size of transistor, (c) Wire bonding with out size of SLC and transistor. Triquint. 3. 3 Port 1, Port 2. 7.5 GHz 0.391 j0.039. 3 1083
THE JOURNAL OF KOREAN INSTITUTE OF ELECTROMAGNETIC ENGINEERING AND SCIENCE. vol. 24, no. 11, Nov. 2013. 그림 3. Fig. 3. Conceptual diagram of input matching circuit.. high-q. 2 SLC,. 2-4-2 출력정합회로설계 - [5],[6]. - De-embedding. 10 GHz EM simulation. 4. 4 Port 1 GaAs phemt bare-chip, Port 2. 4 A.. 2-5 패키지영향을고려한 EM Simulation 설계 5., gold. 5 Port 1 Port 4, Port 2 Port 3. EM simulation Agilent ADS, 그림 4. Fig. 4. Conceptual diagram of ouput matching circuit. 그림 5. HFSS Fig. 5. HFSS model for package effect. 1084
Memory Effect C- GaAs 그림 7. Memory effect Fig. 7. Definition of memory effect. 그림 6. Fig. 6. Designed input output optimum impedance.,. 6., 7.5 GHz 50 Ω, 0.947 174.5. 1. 2-6 Memory Effect 현상과 Memory Effect 감쇄바이어스회로설계 2 Tayler series tone spacing IMD3. 7 IMD3(lower) tone spacing memory effect [7] IMD3. memory effect. 8 memory effect. 2 그림 8. Memory effect Fig. 8. Nonlinear model for analysis memory effect. (a) (b). V in 2, 1 V gs 2 envelope (ω 2 ω 1, ω 1 ω 2 ) 2 (2ω 2, 2ω 1 ). envelope ω 2 ω 1 ω 2 transconductance V out 2 2 ω 2 ω 1. 2 harmonic 2ω 2 ω 1 2 2ω 2 ω 1. 2 envelope 2 1085
THE JOURNAL OF KOREAN INSTITUTE OF ELECTROMAGNETIC ENGINEERING AND SCIENCE. vol. 24, no. 11, Nov. 2013. 2ω 2 ω 1 3 2ω 2 ω 1 IMD3. 3 2ω 2 ω 1 2ω 2 ω 1, 2 envelope 2ω 2 ω 1 2ω 2 ω 1 IMD- 3(upper) IMD3(lower) [8] [10]. 2 envelope envelope,. ω 2 ω 1 envelope envelope IMD3. Envelope tantal envelope IMD3 [11]. tantal GaAs phemt, tantal., envelope envelope ω 2 ω 1. 9 memory effect envelope.. A. B envelope envelope. Envelope (a) 그림 9. (a), (b) Fig. 9. (a) General gate bias circuit, (b) proposed gate bias circuit. 그림 10. Fig. 10. Impedance of proposed gate bias circuit and general gate bias circuit. A B envelope. 10 9(a), (b) Z A., envelope R 1. (b) 1086
Memory Effect C- GaAs envelope L 1. envelope.. 제작및측정결과 11(a). 17.4 24.0 mm 2, 9.9, 0.635 mm (Al 2 O 3 ). 5.3 14 mm 2. (a)., CuW heat sink. AuSn(80:20) heat sink,, eutectic bonding. 11(b) IMFET memory effect IMFET. 3.0 0.5 mm Rogers RO3003. thermal grease,. 12 EM simulation IMFET. EM simulation 7.1 7.8 GHz 10 db, 7.8 GHz 10 db. EM Simulation. 12. 13 IMFET. IMFET RF (b) 그림 11. (a) IMFET, (b) memory effect Fig. 11. (a) IMFET photograph, (b) measurement jig with minimized memory effect bias circuit. 그림 12. EM simulation S-parameter Fig. 12. EM simulated and measured S-parameter. 1087
THE JOURNAL OF KOREAN INSTITUTE OF ELECTROMAGNETIC ENGINEERING AND SCIENCE. vol. 24, no. 11, Nov. 2013. 그림 13. IMFET Fig. 13. Block diagram of characteristic measurement of IMFET. 그림 14. 7.1 7.8 GHz P 1dB, Fig. 14. P 1dB, power gain, efficiency at 7.1 7.8 GHz. 표 3. Table 3. Bonding wire inductance of wire structure. P 1dB (dbm) 0.946 175.1 38.51 0.924 177.8 40.21 0.934 176.3 39.71 0.928 177.2 40.28 0.932 176.6 39.98 1 A 0.73 V. Drive amplifier, IMFET drive amplifier IMFET Agilent E4418. power sensor dynamic rage Agilent E4418. 3, EM simulation. EM simulation. EM simulation 0.924 177 0.928 178. 14 IMFET P 1dB, 그림 15. 26 dbm IMD3(upper) IMD3 (lower) Fig. 15. Measured IMD3(upper) and IMD3(lower) at 26 dbm each tone.. 7.1 7.8 GHz P 1dB 40.1 ±0.3 dbm, 10.0±0.3 db, 33.4 %., De-embedding. 15 memory effect 2-tone 26 dbm IMD3(upper) IMD3(lower). 2-tone 10 MHz offset., 7.1 7.8 GHz IMD3(upper) IMD3(lower) 40 dbc, 0.76 db. 1088
Memory Effect C- GaAs. 결론 C- GaAs phemt 10 W. EM simulation., EM simulation. Memory effect IMD3. 7.1 7.8 GHz P 1dB 39.8 40.4 dbm, 9.7 10.4 db, 33.4 38.0 %. memory effect IMD3(upper) IMD3 (lower) 0.76 db. memory effect IMD3. 참고문헌 [1] M. Kohno, T. Fujioka, K. Hayashi, Y. Itoh, Y. Ikeda, K. Seino, and M. Yamanouchi, "High efficient C- band 27 W internally-matched GaAs FET for space application", IEEE MTT-S International, Microwave Symposium Digest, vol. 1, pp. 273-276, May 1994. [2],,,,, "Wi- MAX GaN HEMT 4 W ",, 22(2), pp. 162-172, 2011 2. [3] H. Noto, H. Maehara, M. Koyanagi, H. Utsumi, J. Nishihara, H. Otsuka, K. Yamanaka, M. Nakayama, and Y. Hirano, "X-and Ku-band internnaly matched GaN amplifiers with more than 100 W output power", Microwave Integrated Circuits Conference (Eu- MIC), 2012 7th European, pp. 695-698, Oct. 2012. [4],,,,, " ",, 57(4), pp. 653-659, 2008 4. [5],,,,,,, " - - X- 40 W GaN HEMT ",, 24(11), pp. 1034-1046, 2011 11. [6],,,,,, "X- GaN HEMT bare-chip - -RF ", ITS, 10(1), pp. 42-48, 2011 2. [7] J. Vuolevi, T. Rahkonen, and J. Manninen "Measurement technique for characterizing memory effect in RF power amplifiers", IEEE Trans. Microwave Theory Tech., vol. 49, no. 8, pp. 1383-1389, Aug. 2001. [8],,, "phemt IMD3 ACPR ",, pp. 221-224, 2005 11. [9] N. Kim, V. Aparin, and L. Larson "Analysis of IM3 asymmetry in MOSFET small-signal amplifier", IE- EE Trans, Regular Papers, vol. 58, issue 4, pp. 668-676, Apr. 2011. [10] K. Remley, D. Williams, D. Schreurs, and J. Wood, "Simplifying and interpreting two-tone measurement", IEEE Trans., Microwave Theory Tech., vol. 52, Issue. 8, pp. 2576-2584, Aug. 2004. [11] J. Cha, I. Kim, S. Hong, B. Kim, J. S. Lee, and H. S. Kim, "Memory effect minimization and wide instantaneous bandwidth operation of a base station power amplifier", Microwave Journal, vol. 46, no. 2, pp. 124-130, Feb. 2003. 1089
THE JOURNAL OF KOREAN INSTITUTE OF ELECTROMAGNETIC ENGINEERING AND SCIENCE. vol. 24, no. 11, Nov. 2013. 2012 2 : ( ) 2012 3 : [ 주관심분야 ] 1993 2 : ( ) 1995 2 : ( ) 2001 2 : ( ) 2000 8 2002 8 : LG RF team 2002 9 2005 8 : Chip Solution Center 2005 9 : 2009 9 : ( ) [ 주관심분야 ] CMOS RF Transceiver, CMOS Power AMP 2010 2 : ( ) 2012 3 : 1999 1 2007 1 : LG 2007 2 2012 2 : LG MC 2012 3 : [ 주관심분야 ] 1090